/[pcsx2_0.9.7]/trunk/pcsx2/Vif_Codes.cpp
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Contents of /trunk/pcsx2/Vif_Codes.cpp

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Revision 280 - (show annotations) (download)
Thu Dec 23 12:02:12 2010 UTC (9 years, 1 month ago) by william
File size: 20514 byte(s)
re-commit (had local access denied errors when committing)
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #include "PrecompiledHeader.h"
17 #include "Common.h"
18 #include "GS.h"
19 #include "Gif.h"
20 #include "Vif_Dma.h"
21 #include "newVif.h"
22 #include "VUmicro.h"
23
24 #define vifOp(vifCodeName) _vifT int __fastcall vifCodeName(int pass, const u32 *data)
25 #define pass1 if (pass == 0)
26 #define pass2 if (pass == 1)
27 #define pass3 if (pass == 2)
28 #define vif1Only() { if (!idx) return vifCode_Null<idx>(pass, (u32*)data); }
29 vifOp(vifCode_Null);
30
31 //------------------------------------------------------------------
32 // Vif0/Vif1 Misc Functions
33 //------------------------------------------------------------------
34
35 static __fi void vifFlush(int idx) {
36 if (!idx) vif0FLUSH();
37 else vif1FLUSH();
38 }
39
40 static __fi void vuExecMicro(int idx, u32 addr) {
41 VIFregisters& vifRegs = vifXRegs;
42 int startcycles = 0;
43 //vifFlush(idx);
44
45 //if(vifX.vifstalled == true) return;
46
47 if (vifRegs.itops > (idx ? 0x3ffu : 0xffu)) {
48 Console.WriteLn("VIF%d ITOP overrun! %x", idx, vifRegs.itops);
49 vifRegs.itops &= (idx ? 0x3ffu : 0xffu);
50 }
51
52 vifRegs.itop = vifRegs.itops;
53
54 if (idx) {
55 // in case we're handling a VIF1 execMicro, set the top with the tops value
56 vifRegs.top = vifRegs.tops & 0x3ff;
57
58 // is DBF flag set in VIF_STAT?
59 if (vifRegs.stat.DBF) {
60 // it is, so set tops with base, and clear the stat DBF flag
61 vifRegs.tops = vifRegs.base;
62 vifRegs.stat.DBF = false;
63 }
64 else {
65 // it is not, so set tops with base + offset, and set stat DBF flag
66 vifRegs.tops = vifRegs.base + vifRegs.ofst;
67 vifRegs.stat.DBF = true;
68 }
69 }
70
71 if(!idx)startcycles = VU0.cycle;
72 else startcycles = VU1.cycle;
73
74 if (!idx) vu0ExecMicro(addr);
75 else vu1ExecMicro(addr);
76
77 if(!idx) { g_vu0Cycles += (VU0.cycle-startcycles) * BIAS; g_packetsizeonvu = vif0.vifpacketsize; }
78 else { g_vu1Cycles += (VU1.cycle-startcycles) * BIAS; g_packetsizeonvu = vif1.vifpacketsize; }
79 //DevCon.Warning("Ran VU%x, VU0 Cycles %x, VU1 Cycles %x", idx, g_vu0Cycles, g_vu1Cycles);
80 GetVifX.vifstalled = true;
81 }
82
83 u8 schedulepath3msk = 0;
84
85 void Vif1MskPath3() {
86
87 vif1Regs.mskpath3 = schedulepath3msk & 0x1;
88 GIF_LOG("VIF MSKPATH3 %x gif str %x path3 status %x", vif1Regs.mskpath3, gifch.chcr.STR, GSTransferStatus.PTH3);
89 gifRegs.stat.M3P = vif1Regs.mskpath3;
90
91 if (!vif1Regs.mskpath3)
92 {
93 //if(GSTransferStatus.PTH3 > TRANSFER_MODE && gif->chcr.STR) GSTransferStatus.PTH3 = TRANSFER_MODE;
94 //DevCon.Warning("Mask off");
95 //if(GSTransferStatus.PTH3 >= PENDINGSTOP_MODE) GSTransferStatus.PTH3 = IDLE_MODE;
96 if(gifRegs.stat.P3Q)
97 {
98 gsInterrupt();//gsInterrupt();
99 }
100
101 }// else if(!gif->chcr.STR && GSTransferStatus.PTH3 == IDLE_MODE) GSTransferStatus.PTH3 = STOPPED_MODE;//else DevCon.Warning("Mask on");
102
103 schedulepath3msk = 0;
104 }
105
106 //------------------------------------------------------------------
107 // Vif0/Vif1 Code Implementations
108 //------------------------------------------------------------------
109
110 vifOp(vifCode_Base) {
111 vif1Only();
112 pass1 { vif1Regs.base = vif1Regs.code & 0x3ff; vif1.cmd = 0; }
113 pass3 { VifCodeLog("Base"); }
114 return 0;
115 }
116
117 extern bool SIGNAL_IMR_Pending;
118 static __aligned16 u32 partial_write[4];
119 static uint partial_count = 0;
120
121 template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDirectHL) {
122 pass1 {
123 vif1Only();
124 int vifImm = (u16)vif1Regs.code;
125 vif1.tag.size = vifImm ? (vifImm*4) : (65536*4);
126 vif1.vifstalled = true;
127 gifRegs.stat.P2Q = true;
128 if (gifRegs.stat.PSE) // temporarily stop
129 {
130 Console.WriteLn("Gif dma temp paused? VIF DIRECT");
131 vif1.GifWaitState = 3;
132 vif1Regs.stat.VGW = true;
133 }
134 //Should cause this to split here to try and time PATH3 right.
135 return 0;
136 }
137 pass2 {
138 vif1Only();
139
140 if (GSTransferStatus.PTH3 < IDLE_MODE || gifRegs.stat.P1Q == true)
141 {
142 if(gifRegs.stat.APATH == GIF_APATH2 || ((GSTransferStatus.PTH3 <= IMAGE_MODE && gifRegs.stat.IMT && (vif1.cmd & 0x7f) == 0x50)) && gifRegs.stat.P1Q == false)
143 {
144 //Do nothing, allow it
145 vif1Regs.stat.VGW = false;
146 //if(gifRegs.stat.APATH != GIF_APATH2)DevCon.Warning("Continue DIRECT/HL %x P3 %x APATH %x P1Q %x", vif1.cmd, GSTransferStatus.PTH3, gifRegs.stat.APATH, gifRegs.stat.P1Q);
147 }
148 else
149 {
150 //DevCon.Warning("Stall DIRECT/HL %x P3 %x APATH %x P1Q %x", vif1.cmd, GSTransferStatus.PTH3, gifRegs.stat.APATH, gifRegs.stat.P1Q);
151 vif1Regs.stat.VGW = true; // PATH3 is in image mode (DIRECTHL), or busy (BOTH no IMT)
152 vif1.GifWaitState = 0;
153 vif1.vifstalled = true;
154 return 0;
155 }
156 }
157 if(SIGNAL_IMR_Pending == true)
158 {
159 //DevCon.Warning("Path 2 Paused (At start)");
160 vif1.vifstalled = true;
161 return 0;
162 }
163 if (gifRegs.stat.PSE) // temporarily stop
164 {
165 Console.WriteLn("Gif dma temp paused? VIF DIRECT");
166 vif1.GifWaitState = 3;
167 vif1.vifstalled = true;
168 vif1Regs.stat.VGW = true;
169 return 0;
170 }
171
172 // HACK ATTACK!
173 // we shouldn't be clearing the queue flag here at all. Ideally, the queue statuses
174 // should be checked, handled, and cleared from the EOP check in GIFPath only. --air
175 gifRegs.stat.clear_flags(GIF_STAT_P2Q);
176
177 uint minSize = aMin(vif1.vifpacketsize, vif1.tag.size);
178 uint ret;
179
180 if(minSize < 4 || partial_count > 0)
181 {
182 // When TTE==1, the VIF might end up sending us 8-byte packets instead of the usual 16-byte
183 // variety, if DIRECT tags cross chain dma boundaries. The actual behavior of real hardware
184 // is unknown at this time, but it seems that games *only* ever try to upload zero'd data
185 // in this situation.
186 //
187 // Games that use TTE==1 and DIRECT in this fashion: ICO
188 //
189 // Because DIRECT normally has a strict QWC alignment requirement, and this funky behavior
190 // only seems to happen on TTE mode transfers with their split-64-bit packets, there shouldn't
191 // be any need to worry about queuing more than 16 bytes of data,
192 //
193
194
195
196 ret = 0;
197 minSize = aMin(minSize, 4-partial_count);
198 for( uint i=0; i<(minSize & 3); ++i)
199 {
200 partial_write[partial_count++] = ((u32*)data)[i];
201 ret++;
202 }
203
204 pxAssume( partial_count <= 4 );
205
206 if (partial_count == 4)
207 {
208 GetMTGS().PrepDataPacket(GIF_PATH_2, 1);
209 GIFPath_CopyTag(GIF_PATH_2, (u128*)partial_write, 1);
210 GetMTGS().SendDataPacket();
211 partial_count = 0;
212 }
213 }
214 else
215 {
216 if (!minSize)
217 DevCon.Warning("VIF DIRECT (PATH2): No Data Transfer?");
218
219 // TTE=1 mode is the only time we should be getting DIRECT packet sizes that are
220 // not a multiple of QWC, and those are assured to be under 128 bits in size.
221 // So if this assert is triggered then it probably means something else is amiss.
222 pxAssertMsg((minSize & 3) == 0, "DIRECT packet size is not a multiple of QWC." );
223
224 GetMTGS().PrepDataPacket(GIF_PATH_2, minSize/4);
225 ret = GIFPath_CopyTag(GIF_PATH_2, (u128*)data, minSize/4)*4;
226 GetMTGS().SendDataPacket();
227 }
228
229 vif1.tag.size -= ret;
230
231 if(vif1.tag.size == 0)
232 {
233 vif1.cmd = 0;
234 }
235 vif1.vifstalled = true;
236 return ret;
237 }
238 return 0;
239 }
240
241 vifOp(vifCode_Direct) {
242 pass3 { VifCodeLog("Direct"); }
243 return _vifCode_Direct<idx>(pass, (u8*)data, 0);
244 }
245
246 vifOp(vifCode_DirectHL) {
247 pass3 { VifCodeLog("DirectHL"); }
248 return _vifCode_Direct<idx>(pass, (u8*)data, 1);
249 }
250
251 // ToDo: FixMe
252 vifOp(vifCode_Flush) {
253 vif1Only();
254 vifStruct& vifX = GetVifX;
255 pass1 { vifFlush(idx); vifX.cmd = 0; }
256 pass3 { VifCodeLog("Flush"); }
257 return 0;
258 }
259
260 // ToDo: FixMe
261 vifOp(vifCode_FlushA) {
262 vif1Only();
263 vifStruct& vifX = GetVifX;
264 pass1 {
265 vifFlush(idx);
266 // Gif is already transferring so wait for it.
267 if (gifRegs.stat.P1Q || GSTransferStatus.PTH3 <= PENDINGSTOP_MODE) {
268 //DevCon.Warning("VIF FlushA Wait MSK = %x", vif1Regs.mskpath3);
269 //
270
271 //DevCon.WriteLn("FlushA path3 Wait! PTH3 MD %x STR %x", GSTransferStatus.PTH3, gif->chcr.STR);
272 vif1Regs.stat.VGW = true;
273 vifX.GifWaitState = 1;
274 vifX.vifstalled = true;
275 } // else DevCon.WriteLn("FlushA path3 no Wait! PTH3 MD %x STR %x", GSTransferStatus.PTH3, gif->chcr.STR);
276
277 vifX.cmd = 0;
278 }
279 pass3 { VifCodeLog("FlushA"); }
280 return 0;
281 }
282
283 // ToDo: FixMe
284 vifOp(vifCode_FlushE) {
285 vifStruct& vifX = GetVifX;
286 pass1 { vifFlush(idx); vifX.cmd = 0; }
287 pass3 { VifCodeLog("FlushE"); }
288 return 0;
289 }
290
291 vifOp(vifCode_ITop) {
292 pass1 { vifXRegs.itops = vifXRegs.code & 0x3ff; GetVifX.cmd = 0; }
293 pass3 { VifCodeLog("ITop"); }
294 return 0;
295 }
296
297 vifOp(vifCode_Mark) {
298 vifStruct& vifX = GetVifX;
299 pass1 {
300 vifXRegs.mark = (u16)vifXRegs.code;
301 vifXRegs.stat.MRK = true;
302 vifX.cmd = 0;
303 }
304 pass3 { VifCodeLog("Mark"); }
305 return 0;
306 }
307
308 static __fi void _vifCode_MPG(int idx, u32 addr, const u32 *data, int size) {
309 VURegs& VUx = idx ? VU1 : VU0;
310 pxAssume(VUx.Micro > 0);
311
312 if (memcmp_mmx(VUx.Micro + addr, data, size*4)) {
313 // Clear VU memory before writing!
314 // (VUs expect size to be 32-bit scale, same as VIF's internal working sizes)
315 if (!idx) CpuVU0->Clear(addr, size);
316 else CpuVU1->Clear(addr, size);
317 memcpy_fast(VUx.Micro + addr, data, size*4);
318 }
319 }
320
321 vifOp(vifCode_MPG) {
322 vifStruct& vifX = GetVifX;
323 pass1 {
324 int vifNum = (u8)(vifXRegs.code >> 16);
325 vifX.tag.addr = (u16)(vifXRegs.code << 3) & (idx ? 0x3fff : 0xfff);
326 vifX.tag.size = vifNum ? (vifNum*2) : 512;
327 //vifFlush(idx);
328 return 1;
329 }
330 pass2 {
331 if (vifX.vifpacketsize < vifX.tag.size) { // Partial Transfer
332 if((vifX.tag.addr + vifX.vifpacketsize*4) > (idx ? 0x4000 : 0x1000)) {
333 DevCon.Warning("Vif%d MPG Split Overflow", idx);
334 }
335 _vifCode_MPG(idx, vifX.tag.addr, data, vifX.vifpacketsize);
336 vifX.tag.addr += vifX.vifpacketsize * 4;
337 vifX.tag.size -= vifX.vifpacketsize;
338 return vifX.vifpacketsize;
339 }
340 else { // Full Transfer
341 if((vifX.tag.addr + vifX.tag.size*4) > (idx ? 0x4000 : 0x1000)) {
342 DevCon.Warning("Vif%d MPG Split Overflow", idx);
343 }
344 _vifCode_MPG(idx, vifX.tag.addr, data, vifX.tag.size);
345 int ret = vifX.tag.size;
346 vifX.tag.size = 0;
347 vifX.cmd = 0;
348 return ret;
349 }
350 }
351 pass3 { VifCodeLog("MPG"); }
352 return 0;
353 }
354
355 vifOp(vifCode_MSCAL) {
356 vifStruct& vifX = GetVifX;
357 pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0;}
358 pass3 { VifCodeLog("MSCAL"); }
359 return 0;
360 }
361
362 vifOp(vifCode_MSCALF) {
363 vifStruct& vifX = GetVifX;
364 pass1 { vifFlush(idx); vuExecMicro(idx, (u16)(vifXRegs.code) << 3); vifX.cmd = 0; }
365 pass3 { VifCodeLog("MSCALF"); }
366 return 0;
367 }
368
369 vifOp(vifCode_MSCNT) {
370 vifStruct& vifX = GetVifX;
371 pass1 { vifFlush(idx); vuExecMicro(idx, -1); vifX.cmd = 0; }
372 pass3 { VifCodeLog("MSCNT"); }
373 return 0;
374 }
375
376 // ToDo: FixMe
377 vifOp(vifCode_MskPath3) {
378 vif1Only();
379 pass1 {
380 //I Hate the timing sensitivity of this stuff
381 if (vif1ch.chcr.STR && vif1.lastcmd != 0x13) {
382 schedulepath3msk = 0x10 | ((vif1Regs.code >> 15) & 0x1);
383 }
384 else
385 {
386 schedulepath3msk = (vif1Regs.code >> 15) & 0x1;
387 Vif1MskPath3();
388 }
389 if(vif1ch.chcr.STR)vif1.vifstalled = true;
390 vif1.cmd = 0;
391 }
392 pass3 { VifCodeLog("MskPath3"); }
393 return 0;
394 }
395
396 vifOp(vifCode_Nop) {
397 pass1 { GetVifX.cmd = 0; }
398 pass3 { VifCodeLog("Nop"); }
399 return 0;
400 }
401
402 // ToDo: Review Flags
403 vifOp(vifCode_Null) {
404 vifStruct& vifX = GetVifX;
405 pass1 {
406 // if ME1, then force the vif to interrupt
407 if (!(vifXRegs.err.ME1)) { // Ignore vifcode and tag mismatch error
408 Console.WriteLn("Vif%d: Unknown VifCmd! [%x]", idx, vifX.cmd);
409 vifXRegs.stat.ER1 = true;
410 vifX.vifstalled = true;
411 //vifX.irq++;
412 }
413 vifX.cmd = 0;
414 }
415 pass2 { Console.Error("Vif%d bad vifcode! [CMD = %x]", idx, vifX.cmd); }
416 pass3 { VifCodeLog("Null"); }
417 return 0;
418 }
419
420 vifOp(vifCode_Offset) {
421 vif1Only();
422 pass1 {
423 vif1Regs.stat.DBF = false;
424 vif1Regs.ofst = vif1Regs.code & 0x3ff;
425 vif1Regs.tops = vif1Regs.base;
426 vif1.cmd = 0;
427 }
428 pass3 { VifCodeLog("Offset"); }
429 return 0;
430 }
431
432 template<int idx> static __fi int _vifCode_STColRow(const u32* data, u32* pmem2) {
433 vifStruct& vifX = GetVifX;
434
435 int ret = min(4 - vifX.tag.addr, vifX.vifpacketsize);
436 pxAssume(vifX.tag.addr < 4);
437 pxAssume(ret > 0);
438
439 switch (ret) {
440 case 4:
441 pmem2[3] = data[3];
442 case 3:
443 pmem2[2] = data[2];
444 case 2:
445 pmem2[1] = data[1];
446 case 1:
447 pmem2[0] = data[0];
448 break;
449 jNO_DEFAULT
450 }
451
452 vifX.tag.addr += ret;
453 vifX.tag.size -= ret;
454 if (!vifX.tag.size) vifX.cmd = 0;
455
456 return ret;
457 }
458
459 vifOp(vifCode_STCol) {
460 vifStruct& vifX = GetVifX;
461 pass1 {
462 vifX.tag.addr = 0;
463 vifX.tag.size = 4;
464 return 1;
465 }
466 pass2 {
467 return _vifCode_STColRow<idx>(data, &vifX.MaskCol._u32[vifX.tag.addr]);
468 }
469 pass3 { VifCodeLog("STCol"); }
470 return 0;
471 }
472
473 vifOp(vifCode_STRow) {
474 vifStruct& vifX = GetVifX;
475
476 pass1 {
477 vifX.tag.addr = 0;
478 vifX.tag.size = 4;
479 return 1;
480 }
481 pass2 {
482 return _vifCode_STColRow<idx>(data, &vifX.MaskRow._u32[vifX.tag.addr]);
483 }
484 pass3 { VifCodeLog("STRow"); }
485 return 0;
486 }
487
488 vifOp(vifCode_STCycl) {
489 vifStruct& vifX = GetVifX;
490 pass1 {
491 vifXRegs.cycle.cl = (u8)(vifXRegs.code);
492 vifXRegs.cycle.wl = (u8)(vifXRegs.code >> 8);
493 vifX.cmd = 0;
494 }
495 pass3 { VifCodeLog("STCycl"); }
496 return 0;
497 }
498
499 vifOp(vifCode_STMask) {
500 vifStruct& vifX = GetVifX;
501 pass1 { vifX.tag.size = 1; }
502 pass2 { vifXRegs.mask = data[0]; vifX.tag.size = 0; vifX.cmd = 0; }
503 pass3 { VifCodeLog("STMask"); }
504 return 1;
505 }
506
507 vifOp(vifCode_STMod) {
508 pass1 { vifXRegs.mode = vifXRegs.code & 0x3; GetVifX.cmd = 0; }
509 pass3 { VifCodeLog("STMod"); }
510 return 0;
511 }
512
513 template< uint idx >
514 static uint calc_addr(bool flg)
515 {
516 VIFregisters& vifRegs = vifXRegs;
517
518 uint retval = vifRegs.code;
519 if (idx && flg) retval += vifRegs.tops;
520 return retval & (idx ? 0x3ff : 0xff);
521 }
522
523 vifOp(vifCode_Unpack) {
524 pass1 {
525 vifUnpackSetup<idx>(data);
526 return 1;
527 }
528 pass2 { return nVifUnpack<idx>((u8*)data); }
529 pass3 {
530 vifStruct& vifX = GetVifX;
531 VIFregisters& vifRegs = vifXRegs;
532 uint vl = vifX.cmd & 0x03;
533 uint vn = (vifX.cmd >> 2) & 0x3;
534 bool flg = (vifRegs.code >> 15) & 1;
535 static const char* const vntbl[] = { "S", "V2", "V3", "V4" };
536 static const uint vltbl[] = { 32, 16, 8, 5 };
537
538 VifCodeLog("Unpack %s_%u (%s) @ 0x%04X%s (cl=%u wl=%u num=0x%02X)",
539 vntbl[vn], vltbl[vl], (vifX.cmd & 0x10) ? "masked" : "unmasked",
540 calc_addr<idx>(flg), flg ? "(FLG)" : "",
541 vifRegs.cycle.cl, vifRegs.cycle.wl, (vifXRegs.code >> 16) & 0xff
542 );
543 }
544 return 0;
545 }
546
547 //------------------------------------------------------------------
548 // Vif0/Vif1 Code Tables
549 //------------------------------------------------------------------
550
551 __aligned16 FnType_VifCmdHandler* const vifCmdHandler[2][128] =
552 {
553 {
554 vifCode_Nop<0> , vifCode_STCycl<0> , vifCode_Offset<0> , vifCode_Base<0> , vifCode_ITop<0> , vifCode_STMod<0> , vifCode_MskPath3<0>, vifCode_Mark<0>, /*0x00*/
555 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x08*/
556 vifCode_FlushE<0> , vifCode_Flush<0> , vifCode_Null<0> , vifCode_FlushA<0> , vifCode_MSCAL<0> , vifCode_MSCALF<0> , vifCode_Null<0> , vifCode_MSCNT<0>, /*0x10*/
557 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x18*/
558 vifCode_STMask<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x20*/
559 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x28*/
560 vifCode_STRow<0> , vifCode_STCol<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x30*/
561 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x38*/
562 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x40*/
563 vifCode_Null<0> , vifCode_Null<0> , vifCode_MPG<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x48*/
564 vifCode_Direct<0> , vifCode_DirectHL<0>, vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x50*/
565 vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0> , vifCode_Null<0>, /*0x58*/
566 vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Null<0>, /*0x60*/
567 vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0>, /*0x68*/
568 vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Null<0>, /*0x70*/
569 vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Null<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> , vifCode_Unpack<0> /*0x78*/
570 },
571 {
572 vifCode_Nop<1> , vifCode_STCycl<1> , vifCode_Offset<1> , vifCode_Base<1> , vifCode_ITop<1> , vifCode_STMod<1> , vifCode_MskPath3<1>, vifCode_Mark<1>, /*0x00*/
573 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x08*/
574 vifCode_FlushE<1> , vifCode_Flush<1> , vifCode_Null<1> , vifCode_FlushA<1> , vifCode_MSCAL<1> , vifCode_MSCALF<1> , vifCode_Null<1> , vifCode_MSCNT<1>, /*0x10*/
575 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x18*/
576 vifCode_STMask<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x20*/
577 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x28*/
578 vifCode_STRow<1> , vifCode_STCol<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x30*/
579 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x38*/
580 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x40*/
581 vifCode_Null<1> , vifCode_Null<1> , vifCode_MPG<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x48*/
582 vifCode_Direct<1> , vifCode_DirectHL<1>, vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x50*/
583 vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1> , vifCode_Null<1>, /*0x58*/
584 vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1>, /*0x60*/
585 vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1>, /*0x68*/
586 vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1>, /*0x70*/
587 vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Null<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> , vifCode_Unpack<1> /*0x78*/
588 }
589 };

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