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william |
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/* PCSX2 - PS2 Emulator for PCs |
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* Copyright (C) 2002-2010 PCSX2 Dev Team |
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* |
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms |
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* of the GNU Lesser General Public License as published by the Free Software Found- |
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* ation, either version 3 of the License, or (at your option) any later version. |
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* |
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR |
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* PURPOSE. See the GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License along with PCSX2. |
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* If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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#pragma once |
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#include "VU.h" |
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#include "VUops.h" |
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#include "R5900.h" |
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#define vuRunCycles (512*12) // Cycles to run ExecuteBlockJIT() for (called from within recs) |
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#define vu0RunCycles (512*12) // Cycles to run vu0 for whenever ExecuteBlock() is called |
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#define vu1RunCycles (3000000) // mVU1 uses this for inf loop detection on dev builds |
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// -------------------------------------------------------------------------------------- |
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// BaseCpuProvider |
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// -------------------------------------------------------------------------------------- |
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// |
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// Design Note: This class is only partial C++ style. It still relies on Alloc and Shutdown |
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// calls for memory and resource management. This is because the underlying implementations |
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// of our CPU emulators don't have properly encapsulated objects yet -- if we allocate ram |
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// in a constructor, it won't get free'd if an exception occurs during object construction. |
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// Once we've resolved all the 'dangling pointers' and stuff in the recompilers, Alloc |
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// and Shutdown can be removed in favor of constructor/destructor syntax. |
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// |
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class BaseCpuProvider |
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{ |
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protected: |
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// allocation counter for multiple init/shutdown calls |
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// (most or all implementations will need this!) |
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int m_AllocCount; |
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public: |
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// this boolean indicates to some generic logging facilities if the VU's registers |
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// are valid for logging or not. (see DisVU1Micro.cpp, etc) [kinda hacky, might |
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// be removed in the future] |
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bool IsInterpreter; |
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public: |
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BaseCpuProvider() |
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{ |
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m_AllocCount = 0; |
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} |
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virtual ~BaseCpuProvider() throw() |
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{ |
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if( m_AllocCount != 0 ) |
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Console.Warning( "Cleanup miscount detected on CPU provider. Count=%d", m_AllocCount ); |
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} |
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virtual const char* GetShortName() const=0; |
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virtual wxString GetLongName() const=0; |
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virtual void Allocate()=0; |
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virtual void Shutdown()=0; |
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virtual void Reset()=0; |
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virtual void Execute(u32 cycles)=0; |
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virtual void ExecuteBlock(bool startUp)=0; |
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virtual void Step()=0; |
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virtual void Clear(u32 Addr, u32 Size)=0; |
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// C++ Calling Conventions are unstable, and some compilers don't even allow us to take the |
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// address of C++ methods. We need to use a wrapper function to invoke the ExecuteBlock from |
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// recompiled code. |
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static void __fastcall ExecuteBlockJIT( BaseCpuProvider* cpu ) |
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{ |
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cpu->Execute(1024); |
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} |
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}; |
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// -------------------------------------------------------------------------------------- |
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// BaseVUmicroCPU |
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// -------------------------------------------------------------------------------------- |
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// Layer class for possible future implementation (currently is nothing more than a type-safe |
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// type define). |
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// |
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class BaseVUmicroCPU : public BaseCpuProvider { |
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public: |
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int m_Idx; |
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u32 m_lastEEcycles; |
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BaseVUmicroCPU() { |
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m_Idx = 0; |
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m_lastEEcycles = 0; |
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} |
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virtual ~BaseVUmicroCPU() throw() {} |
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// Called by the PS2 VM's event manager for every internal vertical sync (occurs at either |
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// 50hz (pal) or 59.94hz (NTSC). |
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// |
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// Exceptions: |
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// This method is not allowed to throw exceptions, since exceptions may not propagate |
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// safely from the context of recompiled code stackframes. |
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// |
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// Thread Affinity: |
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// Called from the EEcore thread. No locking is performed, so any necessary locks must |
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// be implemented by the CPU provider manually. |
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// |
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virtual void Vsync() throw() { } |
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virtual void Step() { |
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// Ideally this would fall back on interpretation for executing single instructions |
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// for all CPU types, but due to VU complexities and large discrepancies between |
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// clamping in recs and ints, it's not really worth bothering with yet. |
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} |
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// Execute VU for the number of VU cycles (recs might go over 0~30 cycles) |
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// virtual void Execute(u32 cycles)=0; |
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// Executes a Block based on static preset cycles OR |
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// Executes a Block based on EE delta time (see VUmicro.cpp) |
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virtual void ExecuteBlock(bool startUp=0); |
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static void __fastcall ExecuteBlockJIT(BaseVUmicroCPU* cpu); |
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}; |
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// -------------------------------------------------------------------------------------- |
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// InterpVU0 / InterpVU1 |
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// -------------------------------------------------------------------------------------- |
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class InterpVU0 : public BaseVUmicroCPU |
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{ |
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public: |
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InterpVU0(); |
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virtual ~InterpVU0() throw() { Shutdown(); } |
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const char* GetShortName() const { return "intVU0"; } |
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wxString GetLongName() const { return L"VU0 Interpreter"; } |
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void Allocate() { } |
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void Shutdown() throw() { } |
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void Reset() { } |
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void Step(); |
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void Execute(u32 cycles); |
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void Clear(u32 addr, u32 size) {} |
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}; |
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class InterpVU1 : public BaseVUmicroCPU |
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{ |
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public: |
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InterpVU1(); |
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virtual ~InterpVU1() throw() { Shutdown(); } |
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const char* GetShortName() const { return "intVU1"; } |
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wxString GetLongName() const { return L"VU1 Interpreter"; } |
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void Allocate() { } |
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void Shutdown() throw() { } |
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void Reset() { } |
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void Step(); |
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void Execute(u32 cycles); |
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void Clear(u32 addr, u32 size) {} |
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}; |
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// -------------------------------------------------------------------------------------- |
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// recMicroVU0 / recMicroVU1 |
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// -------------------------------------------------------------------------------------- |
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class recMicroVU0 : public BaseVUmicroCPU |
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{ |
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public: |
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recMicroVU0(); |
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virtual ~recMicroVU0() throw() { Shutdown(); } |
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const char* GetShortName() const { return "mVU0"; } |
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wxString GetLongName() const { return L"microVU0 Recompiler"; } |
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void Allocate(); |
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void Shutdown() throw(); |
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void Reset(); |
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void Execute(u32 cycles); |
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void Clear(u32 addr, u32 size); |
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void Vsync() throw(); |
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}; |
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class recMicroVU1 : public BaseVUmicroCPU |
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{ |
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public: |
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recMicroVU1(); |
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virtual ~recMicroVU1() throw() { Shutdown(); } |
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const char* GetShortName() const { return "mVU1"; } |
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wxString GetLongName() const { return L"microVU1 Recompiler"; } |
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void Allocate(); |
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void Shutdown() throw(); |
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void Reset(); |
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void Execute(u32 cycles); |
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void Clear(u32 addr, u32 size); |
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void Vsync() throw(); |
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}; |
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// -------------------------------------------------------------------------------------- |
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// recSuperVU0 / recSuperVU1 |
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// -------------------------------------------------------------------------------------- |
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class recSuperVU0 : public BaseVUmicroCPU |
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{ |
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public: |
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recSuperVU0(); |
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const char* GetShortName() const { return "sVU0"; } |
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wxString GetLongName() const { return L"SuperVU0 Recompiler"; } |
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void Allocate(); |
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void Shutdown() throw(); |
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void Reset(); |
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void Execute(u32 cycles); |
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void Clear(u32 Addr, u32 Size); |
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}; |
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class recSuperVU1 : public BaseVUmicroCPU |
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{ |
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public: |
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recSuperVU1(); |
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const char* GetShortName() const { return "sVU1"; } |
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wxString GetLongName() const { return L"SuperVU1 Recompiler"; } |
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void Allocate(); |
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void Shutdown() throw(); |
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void Reset(); |
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void Execute(u32 cycles); |
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void Clear(u32 Addr, u32 Size); |
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}; |
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extern BaseVUmicroCPU* CpuVU0; |
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extern BaseVUmicroCPU* CpuVU1; |
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///////////////////////////////////////////////////////////////// |
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// These functions initialize memory for both VUs. |
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// |
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void vuMicroMemAlloc(); |
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void vuMicroMemShutdown(); |
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void vuMicroMemReset(); |
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///////////////////////////////////////////////////////////////// |
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// Everything else does stuff on a per-VU basis. |
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// |
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void iDumpVU0Registers(); |
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void iDumpVU1Registers(); |
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extern void (*VU0_LOWER_OPCODE[128])(); |
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extern void (*VU0_UPPER_OPCODE[64])(); |
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extern void (*VU0_UPPER_FD_00_TABLE[32])(); |
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extern void (*VU0_UPPER_FD_01_TABLE[32])(); |
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extern void (*VU0_UPPER_FD_10_TABLE[32])(); |
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extern void (*VU0_UPPER_FD_11_TABLE[32])(); |
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extern void (*VU0regs_LOWER_OPCODE[128])(_VURegsNum *VUregsn); |
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extern void (*VU0regs_UPPER_OPCODE[64])(_VURegsNum *VUregsn); |
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extern void (*VU0regs_UPPER_FD_00_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU0regs_UPPER_FD_01_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU0regs_UPPER_FD_10_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU0regs_UPPER_FD_11_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU1_LOWER_OPCODE[128])(); |
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extern void (*VU1_UPPER_OPCODE[64])(); |
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extern void (*VU1_UPPER_FD_00_TABLE[32])(); |
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extern void (*VU1_UPPER_FD_01_TABLE[32])(); |
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extern void (*VU1_UPPER_FD_10_TABLE[32])(); |
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extern void (*VU1_UPPER_FD_11_TABLE[32])(); |
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extern void (*VU1regs_LOWER_OPCODE[128])(_VURegsNum *VUregsn); |
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extern void (*VU1regs_UPPER_OPCODE[64])(_VURegsNum *VUregsn); |
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extern void (*VU1regs_UPPER_FD_00_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU1regs_UPPER_FD_01_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU1regs_UPPER_FD_10_TABLE[32])(_VURegsNum *VUregsn); |
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extern void (*VU1regs_UPPER_FD_11_TABLE[32])(_VURegsNum *VUregsn); |
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// VU0 |
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extern void vu0ResetRegs(); |
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extern void __fastcall vu0ExecMicro(u32 addr); |
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extern void vu0Exec(VURegs* VU); |
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extern void vu0Finish(); |
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extern void recResetVU0( void ); |
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// VU1 |
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extern void vu1Finish(); |
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extern void vu1ResetRegs(); |
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extern void __fastcall vu1ExecMicro(u32 addr); |
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extern void vu1Exec(VURegs* VU); |
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void VU0_UPPER_FD_00(); |
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void VU0_UPPER_FD_01(); |
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void VU0_UPPER_FD_10(); |
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void VU0_UPPER_FD_11(); |
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void VU0LowerOP(); |
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void VU0LowerOP_T3_00(); |
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void VU0LowerOP_T3_01(); |
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void VU0LowerOP_T3_10(); |
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void VU0LowerOP_T3_11(); |
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void VU0unknown(); |
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void VU1_UPPER_FD_00(); |
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void VU1_UPPER_FD_01(); |
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void VU1_UPPER_FD_10(); |
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void VU1_UPPER_FD_11(); |
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void VU1LowerOP(); |
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void VU1LowerOP_T3_00(); |
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void VU1LowerOP_T3_01(); |
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void VU1LowerOP_T3_10(); |
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void VU1LowerOP_T3_11(); |
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void VU1unknown(); |
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void VU0regs_UPPER_FD_00(_VURegsNum *VUregsn); |
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void VU0regs_UPPER_FD_01(_VURegsNum *VUregsn); |
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void VU0regs_UPPER_FD_10(_VURegsNum *VUregsn); |
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void VU0regs_UPPER_FD_11(_VURegsNum *VUregsn); |
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void VU0regsLowerOP(_VURegsNum *VUregsn); |
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void VU0regsLowerOP_T3_00(_VURegsNum *VUregsn); |
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void VU0regsLowerOP_T3_01(_VURegsNum *VUregsn); |
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void VU0regsLowerOP_T3_10(_VURegsNum *VUregsn); |
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void VU0regsLowerOP_T3_11(_VURegsNum *VUregsn); |
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void VU0regsunknown(_VURegsNum *VUregsn); |
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void VU1regs_UPPER_FD_00(_VURegsNum *VUregsn); |
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void VU1regs_UPPER_FD_01(_VURegsNum *VUregsn); |
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void VU1regs_UPPER_FD_10(_VURegsNum *VUregsn); |
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void VU1regs_UPPER_FD_11(_VURegsNum *VUregsn); |
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void VU1regsLowerOP(_VURegsNum *VUregsn); |
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void VU1regsLowerOP_T3_00(_VURegsNum *VUregsn); |
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void VU1regsLowerOP_T3_01(_VURegsNum *VUregsn); |
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void VU1regsLowerOP_T3_10(_VURegsNum *VUregsn); |
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void VU1regsLowerOP_T3_11(_VURegsNum *VUregsn); |
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|
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void VU1regsunknown(_VURegsNum *VUregsn); |
| 353 |
|
|
|
| 354 |
|
|
/***************************************** |
| 355 |
|
|
VU0 Micromode Upper instructions |
| 356 |
|
|
*****************************************/ |
| 357 |
|
|
|
| 358 |
|
|
void VU0MI_ABS(); |
| 359 |
|
|
void VU0MI_ADD(); |
| 360 |
|
|
void VU0MI_ADDi(); |
| 361 |
|
|
void VU0MI_ADDq(); |
| 362 |
|
|
void VU0MI_ADDx(); |
| 363 |
|
|
void VU0MI_ADDy(); |
| 364 |
|
|
void VU0MI_ADDz(); |
| 365 |
|
|
void VU0MI_ADDw(); |
| 366 |
|
|
void VU0MI_ADDA(); |
| 367 |
|
|
void VU0MI_ADDAi(); |
| 368 |
|
|
void VU0MI_ADDAq(); |
| 369 |
|
|
void VU0MI_ADDAx(); |
| 370 |
|
|
void VU0MI_ADDAy(); |
| 371 |
|
|
void VU0MI_ADDAz(); |
| 372 |
|
|
void VU0MI_ADDAw(); |
| 373 |
|
|
void VU0MI_SUB(); |
| 374 |
|
|
void VU0MI_SUBi(); |
| 375 |
|
|
void VU0MI_SUBq(); |
| 376 |
|
|
void VU0MI_SUBx(); |
| 377 |
|
|
void VU0MI_SUBy(); |
| 378 |
|
|
void VU0MI_SUBz(); |
| 379 |
|
|
void VU0MI_SUBw(); |
| 380 |
|
|
void VU0MI_SUBA(); |
| 381 |
|
|
void VU0MI_SUBAi(); |
| 382 |
|
|
void VU0MI_SUBAq(); |
| 383 |
|
|
void VU0MI_SUBAx(); |
| 384 |
|
|
void VU0MI_SUBAy(); |
| 385 |
|
|
void VU0MI_SUBAz(); |
| 386 |
|
|
void VU0MI_SUBAw(); |
| 387 |
|
|
void VU0MI_MUL(); |
| 388 |
|
|
void VU0MI_MULi(); |
| 389 |
|
|
void VU0MI_MULq(); |
| 390 |
|
|
void VU0MI_MULx(); |
| 391 |
|
|
void VU0MI_MULy(); |
| 392 |
|
|
void VU0MI_MULz(); |
| 393 |
|
|
void VU0MI_MULw(); |
| 394 |
|
|
void VU0MI_MULA(); |
| 395 |
|
|
void VU0MI_MULAi(); |
| 396 |
|
|
void VU0MI_MULAq(); |
| 397 |
|
|
void VU0MI_MULAx(); |
| 398 |
|
|
void VU0MI_MULAy(); |
| 399 |
|
|
void VU0MI_MULAz(); |
| 400 |
|
|
void VU0MI_MULAw(); |
| 401 |
|
|
void VU0MI_MADD(); |
| 402 |
|
|
void VU0MI_MADDi(); |
| 403 |
|
|
void VU0MI_MADDq(); |
| 404 |
|
|
void VU0MI_MADDx(); |
| 405 |
|
|
void VU0MI_MADDy(); |
| 406 |
|
|
void VU0MI_MADDz(); |
| 407 |
|
|
void VU0MI_MADDw(); |
| 408 |
|
|
void VU0MI_MADDA(); |
| 409 |
|
|
void VU0MI_MADDAi(); |
| 410 |
|
|
void VU0MI_MADDAq(); |
| 411 |
|
|
void VU0MI_MADDAx(); |
| 412 |
|
|
void VU0MI_MADDAy(); |
| 413 |
|
|
void VU0MI_MADDAz(); |
| 414 |
|
|
void VU0MI_MADDAw(); |
| 415 |
|
|
void VU0MI_MSUB(); |
| 416 |
|
|
void VU0MI_MSUBi(); |
| 417 |
|
|
void VU0MI_MSUBq(); |
| 418 |
|
|
void VU0MI_MSUBx(); |
| 419 |
|
|
void VU0MI_MSUBy(); |
| 420 |
|
|
void VU0MI_MSUBz(); |
| 421 |
|
|
void VU0MI_MSUBw(); |
| 422 |
|
|
void VU0MI_MSUBA(); |
| 423 |
|
|
void VU0MI_MSUBAi(); |
| 424 |
|
|
void VU0MI_MSUBAq(); |
| 425 |
|
|
void VU0MI_MSUBAx(); |
| 426 |
|
|
void VU0MI_MSUBAy(); |
| 427 |
|
|
void VU0MI_MSUBAz(); |
| 428 |
|
|
void VU0MI_MSUBAw(); |
| 429 |
|
|
void VU0MI_MAX(); |
| 430 |
|
|
void VU0MI_MAXi(); |
| 431 |
|
|
void VU0MI_MAXx(); |
| 432 |
|
|
void VU0MI_MAXy(); |
| 433 |
|
|
void VU0MI_MAXz(); |
| 434 |
|
|
void VU0MI_MAXw(); |
| 435 |
|
|
void VU0MI_MINI(); |
| 436 |
|
|
void VU0MI_MINIi(); |
| 437 |
|
|
void VU0MI_MINIx(); |
| 438 |
|
|
void VU0MI_MINIy(); |
| 439 |
|
|
void VU0MI_MINIz(); |
| 440 |
|
|
void VU0MI_MINIw(); |
| 441 |
|
|
void VU0MI_OPMULA(); |
| 442 |
|
|
void VU0MI_OPMSUB(); |
| 443 |
|
|
void VU0MI_NOP(); |
| 444 |
|
|
void VU0MI_FTOI0(); |
| 445 |
|
|
void VU0MI_FTOI4(); |
| 446 |
|
|
void VU0MI_FTOI12(); |
| 447 |
|
|
void VU0MI_FTOI15(); |
| 448 |
|
|
void VU0MI_ITOF0(); |
| 449 |
|
|
void VU0MI_ITOF4(); |
| 450 |
|
|
void VU0MI_ITOF12(); |
| 451 |
|
|
void VU0MI_ITOF15(); |
| 452 |
|
|
void VU0MI_CLIP(); |
| 453 |
|
|
|
| 454 |
|
|
/***************************************** |
| 455 |
|
|
VU0 Micromode Lower instructions |
| 456 |
|
|
*****************************************/ |
| 457 |
|
|
|
| 458 |
|
|
void VU0MI_DIV(); |
| 459 |
|
|
void VU0MI_SQRT(); |
| 460 |
|
|
void VU0MI_RSQRT(); |
| 461 |
|
|
void VU0MI_IADD(); |
| 462 |
|
|
void VU0MI_IADDI(); |
| 463 |
|
|
void VU0MI_IADDIU(); |
| 464 |
|
|
void VU0MI_IAND(); |
| 465 |
|
|
void VU0MI_IOR(); |
| 466 |
|
|
void VU0MI_ISUB(); |
| 467 |
|
|
void VU0MI_ISUBIU(); |
| 468 |
|
|
void VU0MI_MOVE(); |
| 469 |
|
|
void VU0MI_MFIR(); |
| 470 |
|
|
void VU0MI_MTIR(); |
| 471 |
|
|
void VU0MI_MR32(); |
| 472 |
|
|
void VU0MI_LQ(); |
| 473 |
|
|
void VU0MI_LQD(); |
| 474 |
|
|
void VU0MI_LQI(); |
| 475 |
|
|
void VU0MI_SQ(); |
| 476 |
|
|
void VU0MI_SQD(); |
| 477 |
|
|
void VU0MI_SQI(); |
| 478 |
|
|
void VU0MI_ILW(); |
| 479 |
|
|
void VU0MI_ISW(); |
| 480 |
|
|
void VU0MI_ILWR(); |
| 481 |
|
|
void VU0MI_ISWR(); |
| 482 |
|
|
void VU0MI_LOI(); |
| 483 |
|
|
void VU0MI_RINIT(); |
| 484 |
|
|
void VU0MI_RGET(); |
| 485 |
|
|
void VU0MI_RNEXT(); |
| 486 |
|
|
void VU0MI_RXOR(); |
| 487 |
|
|
void VU0MI_WAITQ(); |
| 488 |
|
|
void VU0MI_FSAND(); |
| 489 |
|
|
void VU0MI_FSEQ(); |
| 490 |
|
|
void VU0MI_FSOR(); |
| 491 |
|
|
void VU0MI_FSSET(); |
| 492 |
|
|
void VU0MI_FMAND(); |
| 493 |
|
|
void VU0MI_FMEQ(); |
| 494 |
|
|
void VU0MI_FMOR(); |
| 495 |
|
|
void VU0MI_FCAND(); |
| 496 |
|
|
void VU0MI_FCEQ(); |
| 497 |
|
|
void VU0MI_FCOR(); |
| 498 |
|
|
void VU0MI_FCSET(); |
| 499 |
|
|
void VU0MI_FCGET(); |
| 500 |
|
|
void VU0MI_IBEQ(); |
| 501 |
|
|
void VU0MI_IBGEZ(); |
| 502 |
|
|
void VU0MI_IBGTZ(); |
| 503 |
|
|
void VU0MI_IBLEZ(); |
| 504 |
|
|
void VU0MI_IBLTZ(); |
| 505 |
|
|
void VU0MI_IBNE(); |
| 506 |
|
|
void VU0MI_B(); |
| 507 |
|
|
void VU0MI_BAL(); |
| 508 |
|
|
void VU0MI_JR(); |
| 509 |
|
|
void VU0MI_JALR(); |
| 510 |
|
|
void VU0MI_MFP(); |
| 511 |
|
|
void VU0MI_WAITP(); |
| 512 |
|
|
void VU0MI_ESADD(); |
| 513 |
|
|
void VU0MI_ERSADD(); |
| 514 |
|
|
void VU0MI_ELENG(); |
| 515 |
|
|
void VU0MI_ERLENG(); |
| 516 |
|
|
void VU0MI_EATANxy(); |
| 517 |
|
|
void VU0MI_EATANxz(); |
| 518 |
|
|
void VU0MI_ESUM(); |
| 519 |
|
|
void VU0MI_ERCPR(); |
| 520 |
|
|
void VU0MI_ESQRT(); |
| 521 |
|
|
void VU0MI_ERSQRT(); |
| 522 |
|
|
void VU0MI_ESIN(); |
| 523 |
|
|
void VU0MI_EATAN(); |
| 524 |
|
|
void VU0MI_EEXP(); |
| 525 |
|
|
void VU0MI_XGKICK(); |
| 526 |
|
|
void VU0MI_XTOP(); |
| 527 |
|
|
void VU0MI_XITOP(); |
| 528 |
|
|
|
| 529 |
|
|
/***************************************** |
| 530 |
|
|
VU1 Micromode Upper instructions |
| 531 |
|
|
*****************************************/ |
| 532 |
|
|
|
| 533 |
|
|
void VU0regsMI_ABS(_VURegsNum *VUregsn); |
| 534 |
|
|
void VU0regsMI_ADD(_VURegsNum *VUregsn); |
| 535 |
|
|
void VU0regsMI_ADDi(_VURegsNum *VUregsn); |
| 536 |
|
|
void VU0regsMI_ADDq(_VURegsNum *VUregsn); |
| 537 |
|
|
void VU0regsMI_ADDx(_VURegsNum *VUregsn); |
| 538 |
|
|
void VU0regsMI_ADDy(_VURegsNum *VUregsn); |
| 539 |
|
|
void VU0regsMI_ADDz(_VURegsNum *VUregsn); |
| 540 |
|
|
void VU0regsMI_ADDw(_VURegsNum *VUregsn); |
| 541 |
|
|
void VU0regsMI_ADDA(_VURegsNum *VUregsn); |
| 542 |
|
|
void VU0regsMI_ADDAi(_VURegsNum *VUregsn); |
| 543 |
|
|
void VU0regsMI_ADDAq(_VURegsNum *VUregsn); |
| 544 |
|
|
void VU0regsMI_ADDAx(_VURegsNum *VUregsn); |
| 545 |
|
|
void VU0regsMI_ADDAy(_VURegsNum *VUregsn); |
| 546 |
|
|
void VU0regsMI_ADDAz(_VURegsNum *VUregsn); |
| 547 |
|
|
void VU0regsMI_ADDAw(_VURegsNum *VUregsn); |
| 548 |
|
|
void VU0regsMI_SUB(_VURegsNum *VUregsn); |
| 549 |
|
|
void VU0regsMI_SUBi(_VURegsNum *VUregsn); |
| 550 |
|
|
void VU0regsMI_SUBq(_VURegsNum *VUregsn); |
| 551 |
|
|
void VU0regsMI_SUBx(_VURegsNum *VUregsn); |
| 552 |
|
|
void VU0regsMI_SUBy(_VURegsNum *VUregsn); |
| 553 |
|
|
void VU0regsMI_SUBz(_VURegsNum *VUregsn); |
| 554 |
|
|
void VU0regsMI_SUBw(_VURegsNum *VUregsn); |
| 555 |
|
|
void VU0regsMI_SUBA(_VURegsNum *VUregsn); |
| 556 |
|
|
void VU0regsMI_SUBAi(_VURegsNum *VUregsn); |
| 557 |
|
|
void VU0regsMI_SUBAq(_VURegsNum *VUregsn); |
| 558 |
|
|
void VU0regsMI_SUBAx(_VURegsNum *VUregsn); |
| 559 |
|
|
void VU0regsMI_SUBAy(_VURegsNum *VUregsn); |
| 560 |
|
|
void VU0regsMI_SUBAz(_VURegsNum *VUregsn); |
| 561 |
|
|
void VU0regsMI_SUBAw(_VURegsNum *VUregsn); |
| 562 |
|
|
void VU0regsMI_MUL(_VURegsNum *VUregsn); |
| 563 |
|
|
void VU0regsMI_MULi(_VURegsNum *VUregsn); |
| 564 |
|
|
void VU0regsMI_MULq(_VURegsNum *VUregsn); |
| 565 |
|
|
void VU0regsMI_MULx(_VURegsNum *VUregsn); |
| 566 |
|
|
void VU0regsMI_MULy(_VURegsNum *VUregsn); |
| 567 |
|
|
void VU0regsMI_MULz(_VURegsNum *VUregsn); |
| 568 |
|
|
void VU0regsMI_MULw(_VURegsNum *VUregsn); |
| 569 |
|
|
void VU0regsMI_MULA(_VURegsNum *VUregsn); |
| 570 |
|
|
void VU0regsMI_MULAi(_VURegsNum *VUregsn); |
| 571 |
|
|
void VU0regsMI_MULAq(_VURegsNum *VUregsn); |
| 572 |
|
|
void VU0regsMI_MULAx(_VURegsNum *VUregsn); |
| 573 |
|
|
void VU0regsMI_MULAy(_VURegsNum *VUregsn); |
| 574 |
|
|
void VU0regsMI_MULAz(_VURegsNum *VUregsn); |
| 575 |
|
|
void VU0regsMI_MULAw(_VURegsNum *VUregsn); |
| 576 |
|
|
void VU0regsMI_MADD(_VURegsNum *VUregsn); |
| 577 |
|
|
void VU0regsMI_MADDi(_VURegsNum *VUregsn); |
| 578 |
|
|
void VU0regsMI_MADDq(_VURegsNum *VUregsn); |
| 579 |
|
|
void VU0regsMI_MADDx(_VURegsNum *VUregsn); |
| 580 |
|
|
void VU0regsMI_MADDy(_VURegsNum *VUregsn); |
| 581 |
|
|
void VU0regsMI_MADDz(_VURegsNum *VUregsn); |
| 582 |
|
|
void VU0regsMI_MADDw(_VURegsNum *VUregsn); |
| 583 |
|
|
void VU0regsMI_MADDA(_VURegsNum *VUregsn); |
| 584 |
|
|
void VU0regsMI_MADDAi(_VURegsNum *VUregsn); |
| 585 |
|
|
void VU0regsMI_MADDAq(_VURegsNum *VUregsn); |
| 586 |
|
|
void VU0regsMI_MADDAx(_VURegsNum *VUregsn); |
| 587 |
|
|
void VU0regsMI_MADDAy(_VURegsNum *VUregsn); |
| 588 |
|
|
void VU0regsMI_MADDAz(_VURegsNum *VUregsn); |
| 589 |
|
|
void VU0regsMI_MADDAw(_VURegsNum *VUregsn); |
| 590 |
|
|
void VU0regsMI_MSUB(_VURegsNum *VUregsn); |
| 591 |
|
|
void VU0regsMI_MSUBi(_VURegsNum *VUregsn); |
| 592 |
|
|
void VU0regsMI_MSUBq(_VURegsNum *VUregsn); |
| 593 |
|
|
void VU0regsMI_MSUBx(_VURegsNum *VUregsn); |
| 594 |
|
|
void VU0regsMI_MSUBy(_VURegsNum *VUregsn); |
| 595 |
|
|
void VU0regsMI_MSUBz(_VURegsNum *VUregsn); |
| 596 |
|
|
void VU0regsMI_MSUBw(_VURegsNum *VUregsn); |
| 597 |
|
|
void VU0regsMI_MSUBA(_VURegsNum *VUregsn); |
| 598 |
|
|
void VU0regsMI_MSUBAi(_VURegsNum *VUregsn); |
| 599 |
|
|
void VU0regsMI_MSUBAq(_VURegsNum *VUregsn); |
| 600 |
|
|
void VU0regsMI_MSUBAx(_VURegsNum *VUregsn); |
| 601 |
|
|
void VU0regsMI_MSUBAy(_VURegsNum *VUregsn); |
| 602 |
|
|
void VU0regsMI_MSUBAz(_VURegsNum *VUregsn); |
| 603 |
|
|
void VU0regsMI_MSUBAw(_VURegsNum *VUregsn); |
| 604 |
|
|
void VU0regsMI_MAX(_VURegsNum *VUregsn); |
| 605 |
|
|
void VU0regsMI_MAXi(_VURegsNum *VUregsn); |
| 606 |
|
|
void VU0regsMI_MAXx(_VURegsNum *VUregsn); |
| 607 |
|
|
void VU0regsMI_MAXy(_VURegsNum *VUregsn); |
| 608 |
|
|
void VU0regsMI_MAXz(_VURegsNum *VUregsn); |
| 609 |
|
|
void VU0regsMI_MAXw(_VURegsNum *VUregsn); |
| 610 |
|
|
void VU0regsMI_MINI(_VURegsNum *VUregsn); |
| 611 |
|
|
void VU0regsMI_MINIi(_VURegsNum *VUregsn); |
| 612 |
|
|
void VU0regsMI_MINIx(_VURegsNum *VUregsn); |
| 613 |
|
|
void VU0regsMI_MINIy(_VURegsNum *VUregsn); |
| 614 |
|
|
void VU0regsMI_MINIz(_VURegsNum *VUregsn); |
| 615 |
|
|
void VU0regsMI_MINIw(_VURegsNum *VUregsn); |
| 616 |
|
|
void VU0regsMI_OPMULA(_VURegsNum *VUregsn); |
| 617 |
|
|
void VU0regsMI_OPMSUB(_VURegsNum *VUregsn); |
| 618 |
|
|
void VU0regsMI_NOP(_VURegsNum *VUregsn); |
| 619 |
|
|
void VU0regsMI_FTOI0(_VURegsNum *VUregsn); |
| 620 |
|
|
void VU0regsMI_FTOI4(_VURegsNum *VUregsn); |
| 621 |
|
|
void VU0regsMI_FTOI12(_VURegsNum *VUregsn); |
| 622 |
|
|
void VU0regsMI_FTOI15(_VURegsNum *VUregsn); |
| 623 |
|
|
void VU0regsMI_ITOF0(_VURegsNum *VUregsn); |
| 624 |
|
|
void VU0regsMI_ITOF4(_VURegsNum *VUregsn); |
| 625 |
|
|
void VU0regsMI_ITOF12(_VURegsNum *VUregsn); |
| 626 |
|
|
void VU0regsMI_ITOF15(_VURegsNum *VUregsn); |
| 627 |
|
|
void VU0regsMI_CLIP(_VURegsNum *VUregsn); |
| 628 |
|
|
|
| 629 |
|
|
/***************************************** |
| 630 |
|
|
VU0 Micromode Lower instructions |
| 631 |
|
|
*****************************************/ |
| 632 |
|
|
|
| 633 |
|
|
void VU0regsMI_DIV(_VURegsNum *VUregsn); |
| 634 |
|
|
void VU0regsMI_SQRT(_VURegsNum *VUregsn); |
| 635 |
|
|
void VU0regsMI_RSQRT(_VURegsNum *VUregsn); |
| 636 |
|
|
void VU0regsMI_IADD(_VURegsNum *VUregsn); |
| 637 |
|
|
void VU0regsMI_IADDI(_VURegsNum *VUregsn); |
| 638 |
|
|
void VU0regsMI_IADDIU(_VURegsNum *VUregsn); |
| 639 |
|
|
void VU0regsMI_IAND(_VURegsNum *VUregsn); |
| 640 |
|
|
void VU0regsMI_IOR(_VURegsNum *VUregsn); |
| 641 |
|
|
void VU0regsMI_ISUB(_VURegsNum *VUregsn); |
| 642 |
|
|
void VU0regsMI_ISUBIU(_VURegsNum *VUregsn); |
| 643 |
|
|
void VU0regsMI_MOVE(_VURegsNum *VUregsn); |
| 644 |
|
|
void VU0regsMI_MFIR(_VURegsNum *VUregsn); |
| 645 |
|
|
void VU0regsMI_MTIR(_VURegsNum *VUregsn); |
| 646 |
|
|
void VU0regsMI_MR32(_VURegsNum *VUregsn); |
| 647 |
|
|
void VU0regsMI_LQ(_VURegsNum *VUregsn); |
| 648 |
|
|
void VU0regsMI_LQD(_VURegsNum *VUregsn); |
| 649 |
|
|
void VU0regsMI_LQI(_VURegsNum *VUregsn); |
| 650 |
|
|
void VU0regsMI_SQ(_VURegsNum *VUregsn); |
| 651 |
|
|
void VU0regsMI_SQD(_VURegsNum *VUregsn); |
| 652 |
|
|
void VU0regsMI_SQI(_VURegsNum *VUregsn); |
| 653 |
|
|
void VU0regsMI_ILW(_VURegsNum *VUregsn); |
| 654 |
|
|
void VU0regsMI_ISW(_VURegsNum *VUregsn); |
| 655 |
|
|
void VU0regsMI_ILWR(_VURegsNum *VUregsn); |
| 656 |
|
|
void VU0regsMI_ISWR(_VURegsNum *VUregsn); |
| 657 |
|
|
void VU0regsMI_LOI(_VURegsNum *VUregsn); |
| 658 |
|
|
void VU0regsMI_RINIT(_VURegsNum *VUregsn); |
| 659 |
|
|
void VU0regsMI_RGET(_VURegsNum *VUregsn); |
| 660 |
|
|
void VU0regsMI_RNEXT(_VURegsNum *VUregsn); |
| 661 |
|
|
void VU0regsMI_RXOR(_VURegsNum *VUregsn); |
| 662 |
|
|
void VU0regsMI_WAITQ(_VURegsNum *VUregsn); |
| 663 |
|
|
void VU0regsMI_FSAND(_VURegsNum *VUregsn); |
| 664 |
|
|
void VU0regsMI_FSEQ(_VURegsNum *VUregsn); |
| 665 |
|
|
void VU0regsMI_FSOR(_VURegsNum *VUregsn); |
| 666 |
|
|
void VU0regsMI_FSSET(_VURegsNum *VUregsn); |
| 667 |
|
|
void VU0regsMI_FMAND(_VURegsNum *VUregsn); |
| 668 |
|
|
void VU0regsMI_FMEQ(_VURegsNum *VUregsn); |
| 669 |
|
|
void VU0regsMI_FMOR(_VURegsNum *VUregsn); |
| 670 |
|
|
void VU0regsMI_FCAND(_VURegsNum *VUregsn); |
| 671 |
|
|
void VU0regsMI_FCEQ(_VURegsNum *VUregsn); |
| 672 |
|
|
void VU0regsMI_FCOR(_VURegsNum *VUregsn); |
| 673 |
|
|
void VU0regsMI_FCSET(_VURegsNum *VUregsn); |
| 674 |
|
|
void VU0regsMI_FCGET(_VURegsNum *VUregsn); |
| 675 |
|
|
void VU0regsMI_IBEQ(_VURegsNum *VUregsn); |
| 676 |
|
|
void VU0regsMI_IBGEZ(_VURegsNum *VUregsn); |
| 677 |
|
|
void VU0regsMI_IBGTZ(_VURegsNum *VUregsn); |
| 678 |
|
|
void VU0regsMI_IBLTZ(_VURegsNum *VUregsn); |
| 679 |
|
|
void VU0regsMI_IBLEZ(_VURegsNum *VUregsn); |
| 680 |
|
|
void VU0regsMI_IBNE(_VURegsNum *VUregsn); |
| 681 |
|
|
void VU0regsMI_B(_VURegsNum *VUregsn); |
| 682 |
|
|
void VU0regsMI_BAL(_VURegsNum *VUregsn); |
| 683 |
|
|
void VU0regsMI_JR(_VURegsNum *VUregsn); |
| 684 |
|
|
void VU0regsMI_JALR(_VURegsNum *VUregsn); |
| 685 |
|
|
void VU0regsMI_MFP(_VURegsNum *VUregsn); |
| 686 |
|
|
void VU0regsMI_WAITP(_VURegsNum *VUregsn); |
| 687 |
|
|
void VU0regsMI_ESADD(_VURegsNum *VUregsn); |
| 688 |
|
|
void VU0regsMI_ERSADD(_VURegsNum *VUregsn); |
| 689 |
|
|
void VU0regsMI_ELENG(_VURegsNum *VUregsn); |
| 690 |
|
|
void VU0regsMI_ERLENG(_VURegsNum *VUregsn); |
| 691 |
|
|
void VU0regsMI_EATANxy(_VURegsNum *VUregsn); |
| 692 |
|
|
void VU0regsMI_EATANxz(_VURegsNum *VUregsn); |
| 693 |
|
|
void VU0regsMI_ESUM(_VURegsNum *VUregsn); |
| 694 |
|
|
void VU0regsMI_ERCPR(_VURegsNum *VUregsn); |
| 695 |
|
|
void VU0regsMI_ESQRT(_VURegsNum *VUregsn); |
| 696 |
|
|
void VU0regsMI_ERSQRT(_VURegsNum *VUregsn); |
| 697 |
|
|
void VU0regsMI_ESIN(_VURegsNum *VUregsn); |
| 698 |
|
|
void VU0regsMI_EATAN(_VURegsNum *VUregsn); |
| 699 |
|
|
void VU0regsMI_EEXP(_VURegsNum *VUregsn); |
| 700 |
|
|
void VU0regsMI_XGKICK(_VURegsNum *VUregsn); |
| 701 |
|
|
void VU0regsMI_XTOP(_VURegsNum *VUregsn); |
| 702 |
|
|
void VU0regsMI_XITOP(_VURegsNum *VUregsn); |
| 703 |
|
|
|
| 704 |
|
|
/***************************************** |
| 705 |
|
|
VU1 Micromode Upper instructions |
| 706 |
|
|
*****************************************/ |
| 707 |
|
|
|
| 708 |
|
|
void VU1MI_ABS(); |
| 709 |
|
|
void VU1MI_ADD(); |
| 710 |
|
|
void VU1MI_ADDi(); |
| 711 |
|
|
void VU1MI_ADDq(); |
| 712 |
|
|
void VU1MI_ADDx(); |
| 713 |
|
|
void VU1MI_ADDy(); |
| 714 |
|
|
void VU1MI_ADDz(); |
| 715 |
|
|
void VU1MI_ADDw(); |
| 716 |
|
|
void VU1MI_ADDA(); |
| 717 |
|
|
void VU1MI_ADDAi(); |
| 718 |
|
|
void VU1MI_ADDAq(); |
| 719 |
|
|
void VU1MI_ADDAx(); |
| 720 |
|
|
void VU1MI_ADDAy(); |
| 721 |
|
|
void VU1MI_ADDAz(); |
| 722 |
|
|
void VU1MI_ADDAw(); |
| 723 |
|
|
void VU1MI_SUB(); |
| 724 |
|
|
void VU1MI_SUBi(); |
| 725 |
|
|
void VU1MI_SUBq(); |
| 726 |
|
|
void VU1MI_SUBx(); |
| 727 |
|
|
void VU1MI_SUBy(); |
| 728 |
|
|
void VU1MI_SUBz(); |
| 729 |
|
|
void VU1MI_SUBw(); |
| 730 |
|
|
void VU1MI_SUBA(); |
| 731 |
|
|
void VU1MI_SUBAi(); |
| 732 |
|
|
void VU1MI_SUBAq(); |
| 733 |
|
|
void VU1MI_SUBAx(); |
| 734 |
|
|
void VU1MI_SUBAy(); |
| 735 |
|
|
void VU1MI_SUBAz(); |
| 736 |
|
|
void VU1MI_SUBAw(); |
| 737 |
|
|
void VU1MI_MUL(); |
| 738 |
|
|
void VU1MI_MULi(); |
| 739 |
|
|
void VU1MI_MULq(); |
| 740 |
|
|
void VU1MI_MULx(); |
| 741 |
|
|
void VU1MI_MULy(); |
| 742 |
|
|
void VU1MI_MULz(); |
| 743 |
|
|
void VU1MI_MULw(); |
| 744 |
|
|
void VU1MI_MULA(); |
| 745 |
|
|
void VU1MI_MULAi(); |
| 746 |
|
|
void VU1MI_MULAq(); |
| 747 |
|
|
void VU1MI_MULAx(); |
| 748 |
|
|
void VU1MI_MULAy(); |
| 749 |
|
|
void VU1MI_MULAz(); |
| 750 |
|
|
void VU1MI_MULAw(); |
| 751 |
|
|
void VU1MI_MADD(); |
| 752 |
|
|
void VU1MI_MADDi(); |
| 753 |
|
|
void VU1MI_MADDq(); |
| 754 |
|
|
void VU1MI_MADDx(); |
| 755 |
|
|
void VU1MI_MADDy(); |
| 756 |
|
|
void VU1MI_MADDz(); |
| 757 |
|
|
void VU1MI_MADDw(); |
| 758 |
|
|
void VU1MI_MADDA(); |
| 759 |
|
|
void VU1MI_MADDAi(); |
| 760 |
|
|
void VU1MI_MADDAq(); |
| 761 |
|
|
void VU1MI_MADDAx(); |
| 762 |
|
|
void VU1MI_MADDAy(); |
| 763 |
|
|
void VU1MI_MADDAz(); |
| 764 |
|
|
void VU1MI_MADDAw(); |
| 765 |
|
|
void VU1MI_MSUB(); |
| 766 |
|
|
void VU1MI_MSUBi(); |
| 767 |
|
|
void VU1MI_MSUBq(); |
| 768 |
|
|
void VU1MI_MSUBx(); |
| 769 |
|
|
void VU1MI_MSUBy(); |
| 770 |
|
|
void VU1MI_MSUBz(); |
| 771 |
|
|
void VU1MI_MSUBw(); |
| 772 |
|
|
void VU1MI_MSUBA(); |
| 773 |
|
|
void VU1MI_MSUBAi(); |
| 774 |
|
|
void VU1MI_MSUBAq(); |
| 775 |
|
|
void VU1MI_MSUBAx(); |
| 776 |
|
|
void VU1MI_MSUBAy(); |
| 777 |
|
|
void VU1MI_MSUBAz(); |
| 778 |
|
|
void VU1MI_MSUBAw(); |
| 779 |
|
|
void VU1MI_MAX(); |
| 780 |
|
|
void VU1MI_MAXi(); |
| 781 |
|
|
void VU1MI_MAXx(); |
| 782 |
|
|
void VU1MI_MAXy(); |
| 783 |
|
|
void VU1MI_MAXz(); |
| 784 |
|
|
void VU1MI_MAXw(); |
| 785 |
|
|
void VU1MI_MINI(); |
| 786 |
|
|
void VU1MI_MINIi(); |
| 787 |
|
|
void VU1MI_MINIx(); |
| 788 |
|
|
void VU1MI_MINIy(); |
| 789 |
|
|
void VU1MI_MINIz(); |
| 790 |
|
|
void VU1MI_MINIw(); |
| 791 |
|
|
void VU1MI_OPMULA(); |
| 792 |
|
|
void VU1MI_OPMSUB(); |
| 793 |
|
|
void VU1MI_NOP(); |
| 794 |
|
|
void VU1MI_FTOI0(); |
| 795 |
|
|
void VU1MI_FTOI4(); |
| 796 |
|
|
void VU1MI_FTOI12(); |
| 797 |
|
|
void VU1MI_FTOI15(); |
| 798 |
|
|
void VU1MI_ITOF0(); |
| 799 |
|
|
void VU1MI_ITOF4(); |
| 800 |
|
|
void VU1MI_ITOF12(); |
| 801 |
|
|
void VU1MI_ITOF15(); |
| 802 |
|
|
void VU1MI_CLIP(); |
| 803 |
|
|
|
| 804 |
|
|
/***************************************** |
| 805 |
|
|
VU1 Micromode Lower instructions |
| 806 |
|
|
*****************************************/ |
| 807 |
|
|
|
| 808 |
|
|
void VU1MI_DIV(); |
| 809 |
|
|
void VU1MI_SQRT(); |
| 810 |
|
|
void VU1MI_RSQRT(); |
| 811 |
|
|
void VU1MI_IADD(); |
| 812 |
|
|
void VU1MI_IADDI(); |
| 813 |
|
|
void VU1MI_IADDIU(); |
| 814 |
|
|
void VU1MI_IAND(); |
| 815 |
|
|
void VU1MI_IOR(); |
| 816 |
|
|
void VU1MI_ISUB(); |
| 817 |
|
|
void VU1MI_ISUBIU(); |
| 818 |
|
|
void VU1MI_MOVE(); |
| 819 |
|
|
void VU1MI_MFIR(); |
| 820 |
|
|
void VU1MI_MTIR(); |
| 821 |
|
|
void VU1MI_MR32(); |
| 822 |
|
|
void VU1MI_LQ(); |
| 823 |
|
|
void VU1MI_LQD(); |
| 824 |
|
|
void VU1MI_LQI(); |
| 825 |
|
|
void VU1MI_SQ(); |
| 826 |
|
|
void VU1MI_SQD(); |
| 827 |
|
|
void VU1MI_SQI(); |
| 828 |
|
|
void VU1MI_ILW(); |
| 829 |
|
|
void VU1MI_ISW(); |
| 830 |
|
|
void VU1MI_ILWR(); |
| 831 |
|
|
void VU1MI_ISWR(); |
| 832 |
|
|
void VU1MI_LOI(); |
| 833 |
|
|
void VU1MI_RINIT(); |
| 834 |
|
|
void VU1MI_RGET(); |
| 835 |
|
|
void VU1MI_RNEXT(); |
| 836 |
|
|
void VU1MI_RXOR(); |
| 837 |
|
|
void VU1MI_WAITQ(); |
| 838 |
|
|
void VU1MI_FSAND(); |
| 839 |
|
|
void VU1MI_FSEQ(); |
| 840 |
|
|
void VU1MI_FSOR(); |
| 841 |
|
|
void VU1MI_FSSET(); |
| 842 |
|
|
void VU1MI_FMAND(); |
| 843 |
|
|
void VU1MI_FMEQ(); |
| 844 |
|
|
void VU1MI_FMOR(); |
| 845 |
|
|
void VU1MI_FCAND(); |
| 846 |
|
|
void VU1MI_FCEQ(); |
| 847 |
|
|
void VU1MI_FCOR(); |
| 848 |
|
|
void VU1MI_FCSET(); |
| 849 |
|
|
void VU1MI_FCGET(); |
| 850 |
|
|
void VU1MI_IBEQ(); |
| 851 |
|
|
void VU1MI_IBGEZ(); |
| 852 |
|
|
void VU1MI_IBGTZ(); |
| 853 |
|
|
void VU1MI_IBLTZ(); |
| 854 |
|
|
void VU1MI_IBLEZ(); |
| 855 |
|
|
void VU1MI_IBNE(); |
| 856 |
|
|
void VU1MI_B(); |
| 857 |
|
|
void VU1MI_BAL(); |
| 858 |
|
|
void VU1MI_JR(); |
| 859 |
|
|
void VU1MI_JALR(); |
| 860 |
|
|
void VU1MI_MFP(); |
| 861 |
|
|
void VU1MI_WAITP(); |
| 862 |
|
|
void VU1MI_ESADD(); |
| 863 |
|
|
void VU1MI_ERSADD(); |
| 864 |
|
|
void VU1MI_ELENG(); |
| 865 |
|
|
void VU1MI_ERLENG(); |
| 866 |
|
|
void VU1MI_EATANxy(); |
| 867 |
|
|
void VU1MI_EATANxz(); |
| 868 |
|
|
void VU1MI_ESUM(); |
| 869 |
|
|
void VU1MI_ERCPR(); |
| 870 |
|
|
void VU1MI_ESQRT(); |
| 871 |
|
|
void VU1MI_ERSQRT(); |
| 872 |
|
|
void VU1MI_ESIN(); |
| 873 |
|
|
void VU1MI_EATAN(); |
| 874 |
|
|
void VU1MI_EEXP(); |
| 875 |
|
|
void VU1MI_XGKICK(); |
| 876 |
|
|
void VU1MI_XTOP(); |
| 877 |
|
|
void VU1MI_XITOP(); |
| 878 |
|
|
|
| 879 |
|
|
/***************************************** |
| 880 |
|
|
VU1 Micromode Upper instructions |
| 881 |
|
|
*****************************************/ |
| 882 |
|
|
|
| 883 |
|
|
void VU1regsMI_ABS(_VURegsNum *VUregsn); |
| 884 |
|
|
void VU1regsMI_ADD(_VURegsNum *VUregsn); |
| 885 |
|
|
void VU1regsMI_ADDi(_VURegsNum *VUregsn); |
| 886 |
|
|
void VU1regsMI_ADDq(_VURegsNum *VUregsn); |
| 887 |
|
|
void VU1regsMI_ADDx(_VURegsNum *VUregsn); |
| 888 |
|
|
void VU1regsMI_ADDy(_VURegsNum *VUregsn); |
| 889 |
|
|
void VU1regsMI_ADDz(_VURegsNum *VUregsn); |
| 890 |
|
|
void VU1regsMI_ADDw(_VURegsNum *VUregsn); |
| 891 |
|
|
void VU1regsMI_ADDA(_VURegsNum *VUregsn); |
| 892 |
|
|
void VU1regsMI_ADDAi(_VURegsNum *VUregsn); |
| 893 |
|
|
void VU1regsMI_ADDAq(_VURegsNum *VUregsn); |
| 894 |
|
|
void VU1regsMI_ADDAx(_VURegsNum *VUregsn); |
| 895 |
|
|
void VU1regsMI_ADDAy(_VURegsNum *VUregsn); |
| 896 |
|
|
void VU1regsMI_ADDAz(_VURegsNum *VUregsn); |
| 897 |
|
|
void VU1regsMI_ADDAw(_VURegsNum *VUregsn); |
| 898 |
|
|
void VU1regsMI_SUB(_VURegsNum *VUregsn); |
| 899 |
|
|
void VU1regsMI_SUBi(_VURegsNum *VUregsn); |
| 900 |
|
|
void VU1regsMI_SUBq(_VURegsNum *VUregsn); |
| 901 |
|
|
void VU1regsMI_SUBx(_VURegsNum *VUregsn); |
| 902 |
|
|
void VU1regsMI_SUBy(_VURegsNum *VUregsn); |
| 903 |
|
|
void VU1regsMI_SUBz(_VURegsNum *VUregsn); |
| 904 |
|
|
void VU1regsMI_SUBw(_VURegsNum *VUregsn); |
| 905 |
|
|
void VU1regsMI_SUBA(_VURegsNum *VUregsn); |
| 906 |
|
|
void VU1regsMI_SUBAi(_VURegsNum *VUregsn); |
| 907 |
|
|
void VU1regsMI_SUBAq(_VURegsNum *VUregsn); |
| 908 |
|
|
void VU1regsMI_SUBAx(_VURegsNum *VUregsn); |
| 909 |
|
|
void VU1regsMI_SUBAy(_VURegsNum *VUregsn); |
| 910 |
|
|
void VU1regsMI_SUBAz(_VURegsNum *VUregsn); |
| 911 |
|
|
void VU1regsMI_SUBAw(_VURegsNum *VUregsn); |
| 912 |
|
|
void VU1regsMI_MUL(_VURegsNum *VUregsn); |
| 913 |
|
|
void VU1regsMI_MULi(_VURegsNum *VUregsn); |
| 914 |
|
|
void VU1regsMI_MULq(_VURegsNum *VUregsn); |
| 915 |
|
|
void VU1regsMI_MULx(_VURegsNum *VUregsn); |
| 916 |
|
|
void VU1regsMI_MULy(_VURegsNum *VUregsn); |
| 917 |
|
|
void VU1regsMI_MULz(_VURegsNum *VUregsn); |
| 918 |
|
|
void VU1regsMI_MULw(_VURegsNum *VUregsn); |
| 919 |
|
|
void VU1regsMI_MULA(_VURegsNum *VUregsn); |
| 920 |
|
|
void VU1regsMI_MULAi(_VURegsNum *VUregsn); |
| 921 |
|
|
void VU1regsMI_MULAq(_VURegsNum *VUregsn); |
| 922 |
|
|
void VU1regsMI_MULAx(_VURegsNum *VUregsn); |
| 923 |
|
|
void VU1regsMI_MULAy(_VURegsNum *VUregsn); |
| 924 |
|
|
void VU1regsMI_MULAz(_VURegsNum *VUregsn); |
| 925 |
|
|
void VU1regsMI_MULAw(_VURegsNum *VUregsn); |
| 926 |
|
|
void VU1regsMI_MADD(_VURegsNum *VUregsn); |
| 927 |
|
|
void VU1regsMI_MADDi(_VURegsNum *VUregsn); |
| 928 |
|
|
void VU1regsMI_MADDq(_VURegsNum *VUregsn); |
| 929 |
|
|
void VU1regsMI_MADDx(_VURegsNum *VUregsn); |
| 930 |
|
|
void VU1regsMI_MADDy(_VURegsNum *VUregsn); |
| 931 |
|
|
void VU1regsMI_MADDz(_VURegsNum *VUregsn); |
| 932 |
|
|
void VU1regsMI_MADDw(_VURegsNum *VUregsn); |
| 933 |
|
|
void VU1regsMI_MADDA(_VURegsNum *VUregsn); |
| 934 |
|
|
void VU1regsMI_MADDAi(_VURegsNum *VUregsn); |
| 935 |
|
|
void VU1regsMI_MADDAq(_VURegsNum *VUregsn); |
| 936 |
|
|
void VU1regsMI_MADDAx(_VURegsNum *VUregsn); |
| 937 |
|
|
void VU1regsMI_MADDAy(_VURegsNum *VUregsn); |
| 938 |
|
|
void VU1regsMI_MADDAz(_VURegsNum *VUregsn); |
| 939 |
|
|
void VU1regsMI_MADDAw(_VURegsNum *VUregsn); |
| 940 |
|
|
void VU1regsMI_MSUB(_VURegsNum *VUregsn); |
| 941 |
|
|
void VU1regsMI_MSUBi(_VURegsNum *VUregsn); |
| 942 |
|
|
void VU1regsMI_MSUBq(_VURegsNum *VUregsn); |
| 943 |
|
|
void VU1regsMI_MSUBx(_VURegsNum *VUregsn); |
| 944 |
|
|
void VU1regsMI_MSUBy(_VURegsNum *VUregsn); |
| 945 |
|
|
void VU1regsMI_MSUBz(_VURegsNum *VUregsn); |
| 946 |
|
|
void VU1regsMI_MSUBw(_VURegsNum *VUregsn); |
| 947 |
|
|
void VU1regsMI_MSUBA(_VURegsNum *VUregsn); |
| 948 |
|
|
void VU1regsMI_MSUBAi(_VURegsNum *VUregsn); |
| 949 |
|
|
void VU1regsMI_MSUBAq(_VURegsNum *VUregsn); |
| 950 |
|
|
void VU1regsMI_MSUBAx(_VURegsNum *VUregsn); |
| 951 |
|
|
void VU1regsMI_MSUBAy(_VURegsNum *VUregsn); |
| 952 |
|
|
void VU1regsMI_MSUBAz(_VURegsNum *VUregsn); |
| 953 |
|
|
void VU1regsMI_MSUBAw(_VURegsNum *VUregsn); |
| 954 |
|
|
void VU1regsMI_MAX(_VURegsNum *VUregsn); |
| 955 |
|
|
void VU1regsMI_MAXi(_VURegsNum *VUregsn); |
| 956 |
|
|
void VU1regsMI_MAXx(_VURegsNum *VUregsn); |
| 957 |
|
|
void VU1regsMI_MAXy(_VURegsNum *VUregsn); |
| 958 |
|
|
void VU1regsMI_MAXz(_VURegsNum *VUregsn); |
| 959 |
|
|
void VU1regsMI_MAXw(_VURegsNum *VUregsn); |
| 960 |
|
|
void VU1regsMI_MINI(_VURegsNum *VUregsn); |
| 961 |
|
|
void VU1regsMI_MINIi(_VURegsNum *VUregsn); |
| 962 |
|
|
void VU1regsMI_MINIx(_VURegsNum *VUregsn); |
| 963 |
|
|
void VU1regsMI_MINIy(_VURegsNum *VUregsn); |
| 964 |
|
|
void VU1regsMI_MINIz(_VURegsNum *VUregsn); |
| 965 |
|
|
void VU1regsMI_MINIw(_VURegsNum *VUregsn); |
| 966 |
|
|
void VU1regsMI_OPMULA(_VURegsNum *VUregsn); |
| 967 |
|
|
void VU1regsMI_OPMSUB(_VURegsNum *VUregsn); |
| 968 |
|
|
void VU1regsMI_NOP(_VURegsNum *VUregsn); |
| 969 |
|
|
void VU1regsMI_FTOI0(_VURegsNum *VUregsn); |
| 970 |
|
|
void VU1regsMI_FTOI4(_VURegsNum *VUregsn); |
| 971 |
|
|
void VU1regsMI_FTOI12(_VURegsNum *VUregsn); |
| 972 |
|
|
void VU1regsMI_FTOI15(_VURegsNum *VUregsn); |
| 973 |
|
|
void VU1regsMI_ITOF0(_VURegsNum *VUregsn); |
| 974 |
|
|
void VU1regsMI_ITOF4(_VURegsNum *VUregsn); |
| 975 |
|
|
void VU1regsMI_ITOF12(_VURegsNum *VUregsn); |
| 976 |
|
|
void VU1regsMI_ITOF15(_VURegsNum *VUregsn); |
| 977 |
|
|
void VU1regsMI_CLIP(_VURegsNum *VUregsn); |
| 978 |
|
|
|
| 979 |
|
|
/***************************************** |
| 980 |
|
|
VU1 Micromode Lower instructions |
| 981 |
|
|
*****************************************/ |
| 982 |
|
|
|
| 983 |
|
|
void VU1regsMI_DIV(_VURegsNum *VUregsn); |
| 984 |
|
|
void VU1regsMI_SQRT(_VURegsNum *VUregsn); |
| 985 |
|
|
void VU1regsMI_RSQRT(_VURegsNum *VUregsn); |
| 986 |
|
|
void VU1regsMI_IADD(_VURegsNum *VUregsn); |
| 987 |
|
|
void VU1regsMI_IADDI(_VURegsNum *VUregsn); |
| 988 |
|
|
void VU1regsMI_IADDIU(_VURegsNum *VUregsn); |
| 989 |
|
|
void VU1regsMI_IAND(_VURegsNum *VUregsn); |
| 990 |
|
|
void VU1regsMI_IOR(_VURegsNum *VUregsn); |
| 991 |
|
|
void VU1regsMI_ISUB(_VURegsNum *VUregsn); |
| 992 |
|
|
void VU1regsMI_ISUBIU(_VURegsNum *VUregsn); |
| 993 |
|
|
void VU1regsMI_MOVE(_VURegsNum *VUregsn); |
| 994 |
|
|
void VU1regsMI_MFIR(_VURegsNum *VUregsn); |
| 995 |
|
|
void VU1regsMI_MTIR(_VURegsNum *VUregsn); |
| 996 |
|
|
void VU1regsMI_MR32(_VURegsNum *VUregsn); |
| 997 |
|
|
void VU1regsMI_LQ(_VURegsNum *VUregsn); |
| 998 |
|
|
void VU1regsMI_LQD(_VURegsNum *VUregsn); |
| 999 |
|
|
void VU1regsMI_LQI(_VURegsNum *VUregsn); |
| 1000 |
|
|
void VU1regsMI_SQ(_VURegsNum *VUregsn); |
| 1001 |
|
|
void VU1regsMI_SQD(_VURegsNum *VUregsn); |
| 1002 |
|
|
void VU1regsMI_SQI(_VURegsNum *VUregsn); |
| 1003 |
|
|
void VU1regsMI_ILW(_VURegsNum *VUregsn); |
| 1004 |
|
|
void VU1regsMI_ISW(_VURegsNum *VUregsn); |
| 1005 |
|
|
void VU1regsMI_ILWR(_VURegsNum *VUregsn); |
| 1006 |
|
|
void VU1regsMI_ISWR(_VURegsNum *VUregsn); |
| 1007 |
|
|
void VU1regsMI_LOI(_VURegsNum *VUregsn); |
| 1008 |
|
|
void VU1regsMI_RINIT(_VURegsNum *VUregsn); |
| 1009 |
|
|
void VU1regsMI_RGET(_VURegsNum *VUregsn); |
| 1010 |
|
|
void VU1regsMI_RNEXT(_VURegsNum *VUregsn); |
| 1011 |
|
|
void VU1regsMI_RXOR(_VURegsNum *VUregsn); |
| 1012 |
|
|
void VU1regsMI_WAITQ(_VURegsNum *VUregsn); |
| 1013 |
|
|
void VU1regsMI_FSAND(_VURegsNum *VUregsn); |
| 1014 |
|
|
void VU1regsMI_FSEQ(_VURegsNum *VUregsn); |
| 1015 |
|
|
void VU1regsMI_FSOR(_VURegsNum *VUregsn); |
| 1016 |
|
|
void VU1regsMI_FSSET(_VURegsNum *VUregsn); |
| 1017 |
|
|
void VU1regsMI_FMAND(_VURegsNum *VUregsn); |
| 1018 |
|
|
void VU1regsMI_FMEQ(_VURegsNum *VUregsn); |
| 1019 |
|
|
void VU1regsMI_FMOR(_VURegsNum *VUregsn); |
| 1020 |
|
|
void VU1regsMI_FCAND(_VURegsNum *VUregsn); |
| 1021 |
|
|
void VU1regsMI_FCEQ(_VURegsNum *VUregsn); |
| 1022 |
|
|
void VU1regsMI_FCOR(_VURegsNum *VUregsn); |
| 1023 |
|
|
void VU1regsMI_FCSET(_VURegsNum *VUregsn); |
| 1024 |
|
|
void VU1regsMI_FCGET(_VURegsNum *VUregsn); |
| 1025 |
|
|
void VU1regsMI_IBEQ(_VURegsNum *VUregsn); |
| 1026 |
|
|
void VU1regsMI_IBGEZ(_VURegsNum *VUregsn); |
| 1027 |
|
|
void VU1regsMI_IBGTZ(_VURegsNum *VUregsn); |
| 1028 |
|
|
void VU1regsMI_IBLTZ(_VURegsNum *VUregsn); |
| 1029 |
|
|
void VU1regsMI_IBLEZ(_VURegsNum *VUregsn); |
| 1030 |
|
|
void VU1regsMI_IBNE(_VURegsNum *VUregsn); |
| 1031 |
|
|
void VU1regsMI_B(_VURegsNum *VUregsn); |
| 1032 |
|
|
void VU1regsMI_BAL(_VURegsNum *VUregsn); |
| 1033 |
|
|
void VU1regsMI_JR(_VURegsNum *VUregsn); |
| 1034 |
|
|
void VU1regsMI_JALR(_VURegsNum *VUregsn); |
| 1035 |
|
|
void VU1regsMI_MFP(_VURegsNum *VUregsn); |
| 1036 |
|
|
void VU1regsMI_WAITP(_VURegsNum *VUregsn); |
| 1037 |
|
|
void VU1regsMI_ESADD(_VURegsNum *VUregsn); |
| 1038 |
|
|
void VU1regsMI_ERSADD(_VURegsNum *VUregsn); |
| 1039 |
|
|
void VU1regsMI_ELENG(_VURegsNum *VUregsn); |
| 1040 |
|
|
void VU1regsMI_ERLENG(_VURegsNum *VUregsn); |
| 1041 |
|
|
void VU1regsMI_EATANxy(_VURegsNum *VUregsn); |
| 1042 |
|
|
void VU1regsMI_EATANxz(_VURegsNum *VUregsn); |
| 1043 |
|
|
void VU1regsMI_ESUM(_VURegsNum *VUregsn); |
| 1044 |
|
|
void VU1regsMI_ERCPR(_VURegsNum *VUregsn); |
| 1045 |
|
|
void VU1regsMI_ESQRT(_VURegsNum *VUregsn); |
| 1046 |
|
|
void VU1regsMI_ERSQRT(_VURegsNum *VUregsn); |
| 1047 |
|
|
void VU1regsMI_ESIN(_VURegsNum *VUregsn); |
| 1048 |
|
|
void VU1regsMI_EATAN(_VURegsNum *VUregsn); |
| 1049 |
|
|
void VU1regsMI_EEXP(_VURegsNum *VUregsn); |
| 1050 |
|
|
void VU1regsMI_XGKICK(_VURegsNum *VUregsn); |
| 1051 |
|
|
void VU1regsMI_XTOP(_VURegsNum *VUregsn); |
| 1052 |
|
|
void VU1regsMI_XITOP(_VURegsNum *VUregsn); |
| 1053 |
|
|
|
| 1054 |
|
|
/***************************************** |
| 1055 |
|
|
VU Micromode Tables/Opcodes defs macros |
| 1056 |
|
|
*****************************************/ |
| 1057 |
|
|
|
| 1058 |
|
|
|
| 1059 |
|
|
#define _vuTables(VU, PREFIX) \ |
| 1060 |
|
|
\ |
| 1061 |
|
|
void (*PREFIX##_LOWER_OPCODE[128])() = { \ |
| 1062 |
|
|
PREFIX##MI_LQ , PREFIX##MI_SQ , PREFIX##unknown , PREFIX##unknown, \ |
| 1063 |
|
|
PREFIX##MI_ILW , PREFIX##MI_ISW , PREFIX##unknown , PREFIX##unknown, \ |
| 1064 |
|
|
PREFIX##MI_IADDIU, PREFIX##MI_ISUBIU, PREFIX##unknown , PREFIX##unknown, \ |
| 1065 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1066 |
|
|
PREFIX##MI_FCEQ , PREFIX##MI_FCSET , PREFIX##MI_FCAND, PREFIX##MI_FCOR, /* 0x10 */ \ |
| 1067 |
|
|
PREFIX##MI_FSEQ , PREFIX##MI_FSSET , PREFIX##MI_FSAND, PREFIX##MI_FSOR, \ |
| 1068 |
|
|
PREFIX##MI_FMEQ , PREFIX##unknown , PREFIX##MI_FMAND, PREFIX##MI_FMOR, \ |
| 1069 |
|
|
PREFIX##MI_FCGET , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1070 |
|
|
PREFIX##MI_B , PREFIX##MI_BAL , PREFIX##unknown , PREFIX##unknown, /* 0x20 */ \ |
| 1071 |
|
|
PREFIX##MI_JR , PREFIX##MI_JALR , PREFIX##unknown , PREFIX##unknown, \ |
| 1072 |
|
|
PREFIX##MI_IBEQ , PREFIX##MI_IBNE , PREFIX##unknown , PREFIX##unknown, \ |
| 1073 |
|
|
PREFIX##MI_IBLTZ , PREFIX##MI_IBGTZ , PREFIX##MI_IBLEZ, PREFIX##MI_IBGEZ, \ |
| 1074 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x30 */ \ |
| 1075 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1076 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1077 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1078 |
|
|
PREFIX##LowerOP , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x40*/ \ |
| 1079 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1080 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1081 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1082 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x50 */ \ |
| 1083 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1084 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1085 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1086 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x60 */ \ |
| 1087 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1088 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1089 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1090 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x70 */ \ |
| 1091 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1092 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1093 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1094 |
|
|
}; \ |
| 1095 |
|
|
\ |
| 1096 |
|
|
void (*PREFIX##LowerOP_T3_00_OPCODE[32])() = { \ |
| 1097 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1098 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1099 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1100 |
|
|
PREFIX##MI_MOVE , PREFIX##MI_LQI , PREFIX##MI_DIV , PREFIX##MI_MTIR, \ |
| 1101 |
|
|
PREFIX##MI_RNEXT , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1102 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1103 |
|
|
PREFIX##unknown , PREFIX##MI_MFP , PREFIX##MI_XTOP , PREFIX##MI_XGKICK, \ |
| 1104 |
|
|
PREFIX##MI_ESADD , PREFIX##MI_EATANxy, PREFIX##MI_ESQRT, PREFIX##MI_ESIN, \ |
| 1105 |
|
|
}; \ |
| 1106 |
|
|
\ |
| 1107 |
|
|
void (*PREFIX##LowerOP_T3_01_OPCODE[32])() = { \ |
| 1108 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1109 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1110 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1111 |
|
|
PREFIX##MI_MR32 , PREFIX##MI_SQI , PREFIX##MI_SQRT , PREFIX##MI_MFIR, \ |
| 1112 |
|
|
PREFIX##MI_RGET , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1113 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1114 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##MI_XITOP, PREFIX##unknown, \ |
| 1115 |
|
|
PREFIX##MI_ERSADD, PREFIX##MI_EATANxz, PREFIX##MI_ERSQRT, PREFIX##MI_EATAN, \ |
| 1116 |
|
|
}; \ |
| 1117 |
|
|
\ |
| 1118 |
|
|
void (*PREFIX##LowerOP_T3_10_OPCODE[32])() = { \ |
| 1119 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1120 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1121 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1122 |
|
|
PREFIX##unknown , PREFIX##MI_LQD , PREFIX##MI_RSQRT, PREFIX##MI_ILWR, \ |
| 1123 |
|
|
PREFIX##MI_RINIT , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1124 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1125 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1126 |
|
|
PREFIX##MI_ELENG , PREFIX##MI_ESUM , PREFIX##MI_ERCPR, PREFIX##MI_EEXP, \ |
| 1127 |
|
|
}; \ |
| 1128 |
|
|
\ |
| 1129 |
|
|
void (*PREFIX##LowerOP_T3_11_OPCODE[32])() = { \ |
| 1130 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1131 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1132 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1133 |
|
|
PREFIX##unknown , PREFIX##MI_SQD , PREFIX##MI_WAITQ, PREFIX##MI_ISWR, \ |
| 1134 |
|
|
PREFIX##MI_RXOR , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1135 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1136 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1137 |
|
|
PREFIX##MI_ERLENG, PREFIX##unknown , PREFIX##MI_WAITP, PREFIX##unknown, \ |
| 1138 |
|
|
}; \ |
| 1139 |
|
|
\ |
| 1140 |
|
|
void (*PREFIX##LowerOP_OPCODE[64])() = { \ |
| 1141 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1142 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1143 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1144 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1145 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1146 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1147 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1148 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1149 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x20 */ \ |
| 1150 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1151 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1152 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1153 |
|
|
PREFIX##MI_IADD , PREFIX##MI_ISUB , PREFIX##MI_IADDI, PREFIX##unknown, /* 0x30 */ \ |
| 1154 |
|
|
PREFIX##MI_IAND , PREFIX##MI_IOR , PREFIX##unknown , PREFIX##unknown, \ |
| 1155 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1156 |
|
|
PREFIX##LowerOP_T3_00, PREFIX##LowerOP_T3_01, PREFIX##LowerOP_T3_10, PREFIX##LowerOP_T3_11, \ |
| 1157 |
|
|
}; \ |
| 1158 |
|
|
\ |
| 1159 |
|
|
void (*PREFIX##_UPPER_OPCODE[64])() = { \ |
| 1160 |
|
|
PREFIX##MI_ADDx , PREFIX##MI_ADDy , PREFIX##MI_ADDz , PREFIX##MI_ADDw, \ |
| 1161 |
|
|
PREFIX##MI_SUBx , PREFIX##MI_SUBy , PREFIX##MI_SUBz , PREFIX##MI_SUBw, \ |
| 1162 |
|
|
PREFIX##MI_MADDx , PREFIX##MI_MADDy , PREFIX##MI_MADDz , PREFIX##MI_MADDw, \ |
| 1163 |
|
|
PREFIX##MI_MSUBx , PREFIX##MI_MSUBy , PREFIX##MI_MSUBz , PREFIX##MI_MSUBw, \ |
| 1164 |
|
|
PREFIX##MI_MAXx , PREFIX##MI_MAXy , PREFIX##MI_MAXz , PREFIX##MI_MAXw, /* 0x10 */ \ |
| 1165 |
|
|
PREFIX##MI_MINIx , PREFIX##MI_MINIy , PREFIX##MI_MINIz , PREFIX##MI_MINIw, \ |
| 1166 |
|
|
PREFIX##MI_MULx , PREFIX##MI_MULy , PREFIX##MI_MULz , PREFIX##MI_MULw, \ |
| 1167 |
|
|
PREFIX##MI_MULq , PREFIX##MI_MAXi , PREFIX##MI_MULi , PREFIX##MI_MINIi, \ |
| 1168 |
|
|
PREFIX##MI_ADDq , PREFIX##MI_MADDq , PREFIX##MI_ADDi , PREFIX##MI_MADDi, /* 0x20 */ \ |
| 1169 |
|
|
PREFIX##MI_SUBq , PREFIX##MI_MSUBq , PREFIX##MI_SUBi , PREFIX##MI_MSUBi, \ |
| 1170 |
|
|
PREFIX##MI_ADD , PREFIX##MI_MADD , PREFIX##MI_MUL , PREFIX##MI_MAX, \ |
| 1171 |
|
|
PREFIX##MI_SUB , PREFIX##MI_MSUB , PREFIX##MI_OPMSUB, PREFIX##MI_MINI, \ |
| 1172 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x30 */ \ |
| 1173 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1174 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1175 |
|
|
PREFIX##_UPPER_FD_00, PREFIX##_UPPER_FD_01, PREFIX##_UPPER_FD_10, PREFIX##_UPPER_FD_11, \ |
| 1176 |
|
|
}; \ |
| 1177 |
|
|
\ |
| 1178 |
|
|
void (*PREFIX##_UPPER_FD_00_TABLE[32])() = { \ |
| 1179 |
|
|
PREFIX##MI_ADDAx, PREFIX##MI_SUBAx , PREFIX##MI_MADDAx, PREFIX##MI_MSUBAx, \ |
| 1180 |
|
|
PREFIX##MI_ITOF0, PREFIX##MI_FTOI0, PREFIX##MI_MULAx , PREFIX##MI_MULAq , \ |
| 1181 |
|
|
PREFIX##MI_ADDAq, PREFIX##MI_SUBAq, PREFIX##MI_ADDA , PREFIX##MI_SUBA , \ |
| 1182 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1183 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1184 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1185 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1186 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1187 |
|
|
}; \ |
| 1188 |
|
|
\ |
| 1189 |
|
|
void (*PREFIX##_UPPER_FD_01_TABLE[32])() = { \ |
| 1190 |
|
|
PREFIX##MI_ADDAy , PREFIX##MI_SUBAy , PREFIX##MI_MADDAy, PREFIX##MI_MSUBAy, \ |
| 1191 |
|
|
PREFIX##MI_ITOF4 , PREFIX##MI_FTOI4 , PREFIX##MI_MULAy , PREFIX##MI_ABS , \ |
| 1192 |
|
|
PREFIX##MI_MADDAq, PREFIX##MI_MSUBAq, PREFIX##MI_MADDA , PREFIX##MI_MSUBA , \ |
| 1193 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1194 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1195 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1196 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1197 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1198 |
|
|
}; \ |
| 1199 |
|
|
\ |
| 1200 |
|
|
void (*PREFIX##_UPPER_FD_10_TABLE[32])() = { \ |
| 1201 |
|
|
PREFIX##MI_ADDAz , PREFIX##MI_SUBAz , PREFIX##MI_MADDAz, PREFIX##MI_MSUBAz, \ |
| 1202 |
|
|
PREFIX##MI_ITOF12, PREFIX##MI_FTOI12, PREFIX##MI_MULAz , PREFIX##MI_MULAi , \ |
| 1203 |
|
|
PREFIX##MI_ADDAi, PREFIX##MI_SUBAi , PREFIX##MI_MULA , PREFIX##MI_OPMULA, \ |
| 1204 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1205 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1206 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1207 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1208 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1209 |
|
|
}; \ |
| 1210 |
|
|
\ |
| 1211 |
|
|
void (*PREFIX##_UPPER_FD_11_TABLE[32])() = { \ |
| 1212 |
|
|
PREFIX##MI_ADDAw , PREFIX##MI_SUBAw , PREFIX##MI_MADDAw, PREFIX##MI_MSUBAw, \ |
| 1213 |
|
|
PREFIX##MI_ITOF15, PREFIX##MI_FTOI15, PREFIX##MI_MULAw , PREFIX##MI_CLIP , \ |
| 1214 |
|
|
PREFIX##MI_MADDAi, PREFIX##MI_MSUBAi, PREFIX##unknown , PREFIX##MI_NOP , \ |
| 1215 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1216 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1217 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1218 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1219 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1220 |
|
|
}; \ |
| 1221 |
|
|
\ |
| 1222 |
|
|
\ |
| 1223 |
|
|
\ |
| 1224 |
|
|
void PREFIX##_UPPER_FD_00() { \ |
| 1225 |
|
|
PREFIX##_UPPER_FD_00_TABLE[(VU.code >> 6) & 0x1f ](); \ |
| 1226 |
|
|
} \ |
| 1227 |
|
|
\ |
| 1228 |
|
|
void PREFIX##_UPPER_FD_01() { \ |
| 1229 |
|
|
PREFIX##_UPPER_FD_01_TABLE[(VU.code >> 6) & 0x1f](); \ |
| 1230 |
|
|
} \ |
| 1231 |
|
|
\ |
| 1232 |
|
|
void PREFIX##_UPPER_FD_10() { \ |
| 1233 |
|
|
PREFIX##_UPPER_FD_10_TABLE[(VU.code >> 6) & 0x1f](); \ |
| 1234 |
|
|
} \ |
| 1235 |
|
|
\ |
| 1236 |
|
|
void PREFIX##_UPPER_FD_11() { \ |
| 1237 |
|
|
PREFIX##_UPPER_FD_11_TABLE[(VU.code >> 6) & 0x1f](); \ |
| 1238 |
|
|
} \ |
| 1239 |
|
|
\ |
| 1240 |
|
|
void PREFIX##LowerOP() { \ |
| 1241 |
|
|
PREFIX##LowerOP_OPCODE[VU.code & 0x3f](); \ |
| 1242 |
|
|
} \ |
| 1243 |
|
|
\ |
| 1244 |
|
|
void PREFIX##LowerOP_T3_00() { \ |
| 1245 |
|
|
PREFIX##LowerOP_T3_00_OPCODE[(VU.code >> 6) & 0x1f](); \ |
| 1246 |
|
|
} \ |
| 1247 |
|
|
\ |
| 1248 |
|
|
void PREFIX##LowerOP_T3_01() { \ |
| 1249 |
|
|
PREFIX##LowerOP_T3_01_OPCODE[(VU.code >> 6) & 0x1f](); \ |
| 1250 |
|
|
} \ |
| 1251 |
|
|
\ |
| 1252 |
|
|
void PREFIX##LowerOP_T3_10() { \ |
| 1253 |
|
|
PREFIX##LowerOP_T3_10_OPCODE[(VU.code >> 6) & 0x1f](); \ |
| 1254 |
|
|
} \ |
| 1255 |
|
|
\ |
| 1256 |
|
|
void PREFIX##LowerOP_T3_11() { \ |
| 1257 |
|
|
PREFIX##LowerOP_T3_11_OPCODE[(VU.code >> 6) & 0x1f](); \ |
| 1258 |
|
|
} |
| 1259 |
|
|
|
| 1260 |
|
|
#define _vuRegsTables(VU, PREFIX) \ |
| 1261 |
|
|
\ |
| 1262 |
|
|
void (*PREFIX##_LOWER_OPCODE[128])(_VURegsNum *VUregsn) = { \ |
| 1263 |
|
|
PREFIX##MI_LQ , PREFIX##MI_SQ , PREFIX##unknown , PREFIX##unknown, \ |
| 1264 |
|
|
PREFIX##MI_ILW , PREFIX##MI_ISW , PREFIX##unknown , PREFIX##unknown, \ |
| 1265 |
|
|
PREFIX##MI_IADDIU, PREFIX##MI_ISUBIU, PREFIX##unknown , PREFIX##unknown, \ |
| 1266 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1267 |
|
|
PREFIX##MI_FCEQ , PREFIX##MI_FCSET , PREFIX##MI_FCAND, PREFIX##MI_FCOR, /* 0x10 */ \ |
| 1268 |
|
|
PREFIX##MI_FSEQ , PREFIX##MI_FSSET , PREFIX##MI_FSAND, PREFIX##MI_FSOR, \ |
| 1269 |
|
|
PREFIX##MI_FMEQ , PREFIX##unknown , PREFIX##MI_FMAND, PREFIX##MI_FMOR, \ |
| 1270 |
|
|
PREFIX##MI_FCGET , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1271 |
|
|
PREFIX##MI_B , PREFIX##MI_BAL , PREFIX##unknown , PREFIX##unknown, /* 0x20 */ \ |
| 1272 |
|
|
PREFIX##MI_JR , PREFIX##MI_JALR , PREFIX##unknown , PREFIX##unknown, \ |
| 1273 |
|
|
PREFIX##MI_IBEQ , PREFIX##MI_IBNE , PREFIX##unknown , PREFIX##unknown, \ |
| 1274 |
|
|
PREFIX##MI_IBLTZ , PREFIX##MI_IBGTZ , PREFIX##MI_IBLEZ, PREFIX##MI_IBGEZ, \ |
| 1275 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x30 */ \ |
| 1276 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1277 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1278 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1279 |
|
|
PREFIX##LowerOP , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x40*/ \ |
| 1280 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1281 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1282 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1283 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x50 */ \ |
| 1284 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1285 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1286 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1287 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x60 */ \ |
| 1288 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1289 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1290 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1291 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x70 */ \ |
| 1292 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1293 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1294 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1295 |
|
|
}; \ |
| 1296 |
|
|
\ |
| 1297 |
|
|
void (*PREFIX##LowerOP_T3_00_OPCODE[32])(_VURegsNum *VUregsn) = { \ |
| 1298 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1299 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1300 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1301 |
|
|
PREFIX##MI_MOVE , PREFIX##MI_LQI , PREFIX##MI_DIV , PREFIX##MI_MTIR, \ |
| 1302 |
|
|
PREFIX##MI_RNEXT , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1303 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1304 |
|
|
PREFIX##unknown , PREFIX##MI_MFP , PREFIX##MI_XTOP , PREFIX##MI_XGKICK, \ |
| 1305 |
|
|
PREFIX##MI_ESADD , PREFIX##MI_EATANxy, PREFIX##MI_ESQRT, PREFIX##MI_ESIN, \ |
| 1306 |
|
|
}; \ |
| 1307 |
|
|
\ |
| 1308 |
|
|
void (*PREFIX##LowerOP_T3_01_OPCODE[32])(_VURegsNum *VUregsn) = { \ |
| 1309 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1310 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1311 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1312 |
|
|
PREFIX##MI_MR32 , PREFIX##MI_SQI , PREFIX##MI_SQRT , PREFIX##MI_MFIR, \ |
| 1313 |
|
|
PREFIX##MI_RGET , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1314 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1315 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##MI_XITOP, PREFIX##unknown, \ |
| 1316 |
|
|
PREFIX##MI_ERSADD, PREFIX##MI_EATANxz, PREFIX##MI_ERSQRT, PREFIX##MI_EATAN, \ |
| 1317 |
|
|
}; \ |
| 1318 |
|
|
\ |
| 1319 |
|
|
void (*PREFIX##LowerOP_T3_10_OPCODE[32])(_VURegsNum *VUregsn) = { \ |
| 1320 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1321 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1322 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1323 |
|
|
PREFIX##unknown , PREFIX##MI_LQD , PREFIX##MI_RSQRT, PREFIX##MI_ILWR, \ |
| 1324 |
|
|
PREFIX##MI_RINIT , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1325 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1326 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1327 |
|
|
PREFIX##MI_ELENG , PREFIX##MI_ESUM , PREFIX##MI_ERCPR, PREFIX##MI_EEXP, \ |
| 1328 |
|
|
}; \ |
| 1329 |
|
|
\ |
| 1330 |
|
|
void (*PREFIX##LowerOP_T3_11_OPCODE[32])(_VURegsNum *VUregsn) = { \ |
| 1331 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1332 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1333 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1334 |
|
|
PREFIX##unknown , PREFIX##MI_SQD , PREFIX##MI_WAITQ, PREFIX##MI_ISWR, \ |
| 1335 |
|
|
PREFIX##MI_RXOR , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1336 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1337 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1338 |
|
|
PREFIX##MI_ERLENG, PREFIX##unknown , PREFIX##MI_WAITP, PREFIX##unknown, \ |
| 1339 |
|
|
}; \ |
| 1340 |
|
|
\ |
| 1341 |
|
|
void (*PREFIX##LowerOP_OPCODE[64])(_VURegsNum *VUregsn) = { \ |
| 1342 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1343 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1344 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1345 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1346 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x10 */ \ |
| 1347 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1348 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1349 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1350 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x20 */ \ |
| 1351 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1352 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1353 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1354 |
|
|
PREFIX##MI_IADD , PREFIX##MI_ISUB , PREFIX##MI_IADDI, PREFIX##unknown, /* 0x30 */ \ |
| 1355 |
|
|
PREFIX##MI_IAND , PREFIX##MI_IOR , PREFIX##unknown , PREFIX##unknown, \ |
| 1356 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1357 |
|
|
PREFIX##LowerOP_T3_00, PREFIX##LowerOP_T3_01, PREFIX##LowerOP_T3_10, PREFIX##LowerOP_T3_11, \ |
| 1358 |
|
|
}; \ |
| 1359 |
|
|
\ |
| 1360 |
|
|
void (*PREFIX##_UPPER_OPCODE[64])(_VURegsNum *VUregsn) = { \ |
| 1361 |
|
|
PREFIX##MI_ADDx , PREFIX##MI_ADDy , PREFIX##MI_ADDz , PREFIX##MI_ADDw, \ |
| 1362 |
|
|
PREFIX##MI_SUBx , PREFIX##MI_SUBy , PREFIX##MI_SUBz , PREFIX##MI_SUBw, \ |
| 1363 |
|
|
PREFIX##MI_MADDx , PREFIX##MI_MADDy , PREFIX##MI_MADDz , PREFIX##MI_MADDw, \ |
| 1364 |
|
|
PREFIX##MI_MSUBx , PREFIX##MI_MSUBy , PREFIX##MI_MSUBz , PREFIX##MI_MSUBw, \ |
| 1365 |
|
|
PREFIX##MI_MAXx , PREFIX##MI_MAXy , PREFIX##MI_MAXz , PREFIX##MI_MAXw, /* 0x10 */ \ |
| 1366 |
|
|
PREFIX##MI_MINIx , PREFIX##MI_MINIy , PREFIX##MI_MINIz , PREFIX##MI_MINIw, \ |
| 1367 |
|
|
PREFIX##MI_MULx , PREFIX##MI_MULy , PREFIX##MI_MULz , PREFIX##MI_MULw, \ |
| 1368 |
|
|
PREFIX##MI_MULq , PREFIX##MI_MAXi , PREFIX##MI_MULi , PREFIX##MI_MINIi, \ |
| 1369 |
|
|
PREFIX##MI_ADDq , PREFIX##MI_MADDq , PREFIX##MI_ADDi , PREFIX##MI_MADDi, /* 0x20 */ \ |
| 1370 |
|
|
PREFIX##MI_SUBq , PREFIX##MI_MSUBq , PREFIX##MI_SUBi , PREFIX##MI_MSUBi, \ |
| 1371 |
|
|
PREFIX##MI_ADD , PREFIX##MI_MADD , PREFIX##MI_MUL , PREFIX##MI_MAX, \ |
| 1372 |
|
|
PREFIX##MI_SUB , PREFIX##MI_MSUB , PREFIX##MI_OPMSUB, PREFIX##MI_MINI, \ |
| 1373 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, /* 0x30 */ \ |
| 1374 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1375 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown, \ |
| 1376 |
|
|
PREFIX##_UPPER_FD_00, PREFIX##_UPPER_FD_01, PREFIX##_UPPER_FD_10, PREFIX##_UPPER_FD_11, \ |
| 1377 |
|
|
}; \ |
| 1378 |
|
|
\ |
| 1379 |
|
|
void (*PREFIX##_UPPER_FD_00_TABLE[32])(_VURegsNum *VUregsn) = { \ |
| 1380 |
|
|
PREFIX##MI_ADDAx, PREFIX##MI_SUBAx , PREFIX##MI_MADDAx, PREFIX##MI_MSUBAx, \ |
| 1381 |
|
|
PREFIX##MI_ITOF0, PREFIX##MI_FTOI0, PREFIX##MI_MULAx , PREFIX##MI_MULAq , \ |
| 1382 |
|
|
PREFIX##MI_ADDAq, PREFIX##MI_SUBAq, PREFIX##MI_ADDA , PREFIX##MI_SUBA , \ |
| 1383 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1384 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1385 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1386 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1387 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1388 |
|
|
}; \ |
| 1389 |
|
|
\ |
| 1390 |
|
|
void (*PREFIX##_UPPER_FD_01_TABLE[32])(_VURegsNum *VUregsn) = { \ |
| 1391 |
|
|
PREFIX##MI_ADDAy , PREFIX##MI_SUBAy , PREFIX##MI_MADDAy, PREFIX##MI_MSUBAy, \ |
| 1392 |
|
|
PREFIX##MI_ITOF4 , PREFIX##MI_FTOI4 , PREFIX##MI_MULAy , PREFIX##MI_ABS , \ |
| 1393 |
|
|
PREFIX##MI_MADDAq, PREFIX##MI_MSUBAq, PREFIX##MI_MADDA , PREFIX##MI_MSUBA , \ |
| 1394 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1395 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1396 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1397 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1398 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1399 |
|
|
}; \ |
| 1400 |
|
|
\ |
| 1401 |
|
|
void (*PREFIX##_UPPER_FD_10_TABLE[32])(_VURegsNum *VUregsn) = { \ |
| 1402 |
|
|
PREFIX##MI_ADDAz , PREFIX##MI_SUBAz , PREFIX##MI_MADDAz, PREFIX##MI_MSUBAz, \ |
| 1403 |
|
|
PREFIX##MI_ITOF12, PREFIX##MI_FTOI12, PREFIX##MI_MULAz , PREFIX##MI_MULAi , \ |
| 1404 |
|
|
PREFIX##MI_ADDAi, PREFIX##MI_SUBAi , PREFIX##MI_MULA , PREFIX##MI_OPMULA, \ |
| 1405 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1406 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1407 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1408 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1409 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1410 |
|
|
}; \ |
| 1411 |
|
|
\ |
| 1412 |
|
|
void (*PREFIX##_UPPER_FD_11_TABLE[32])(_VURegsNum *VUregsn) = { \ |
| 1413 |
|
|
PREFIX##MI_ADDAw , PREFIX##MI_SUBAw , PREFIX##MI_MADDAw, PREFIX##MI_MSUBAw, \ |
| 1414 |
|
|
PREFIX##MI_ITOF15, PREFIX##MI_FTOI15, PREFIX##MI_MULAw , PREFIX##MI_CLIP , \ |
| 1415 |
|
|
PREFIX##MI_MADDAi, PREFIX##MI_MSUBAi, PREFIX##unknown , PREFIX##MI_NOP , \ |
| 1416 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1417 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1418 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1419 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1420 |
|
|
PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , PREFIX##unknown , \ |
| 1421 |
|
|
}; \ |
| 1422 |
|
|
\ |
| 1423 |
|
|
\ |
| 1424 |
|
|
\ |
| 1425 |
|
|
void PREFIX##_UPPER_FD_00(_VURegsNum *VUregsn) { \ |
| 1426 |
|
|
PREFIX##_UPPER_FD_00_TABLE[(VU.code >> 6) & 0x1f ](VUregsn); \ |
| 1427 |
|
|
} \ |
| 1428 |
|
|
\ |
| 1429 |
|
|
void PREFIX##_UPPER_FD_01(_VURegsNum *VUregsn) { \ |
| 1430 |
|
|
PREFIX##_UPPER_FD_01_TABLE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1431 |
|
|
} \ |
| 1432 |
|
|
\ |
| 1433 |
|
|
void PREFIX##_UPPER_FD_10(_VURegsNum *VUregsn) { \ |
| 1434 |
|
|
PREFIX##_UPPER_FD_10_TABLE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1435 |
|
|
} \ |
| 1436 |
|
|
\ |
| 1437 |
|
|
void PREFIX##_UPPER_FD_11(_VURegsNum *VUregsn) { \ |
| 1438 |
|
|
PREFIX##_UPPER_FD_11_TABLE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1439 |
|
|
} \ |
| 1440 |
|
|
\ |
| 1441 |
|
|
void PREFIX##LowerOP(_VURegsNum *VUregsn) { \ |
| 1442 |
|
|
PREFIX##LowerOP_OPCODE[VU.code & 0x3f](VUregsn); \ |
| 1443 |
|
|
} \ |
| 1444 |
|
|
\ |
| 1445 |
|
|
void PREFIX##LowerOP_T3_00(_VURegsNum *VUregsn) { \ |
| 1446 |
|
|
PREFIX##LowerOP_T3_00_OPCODE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1447 |
|
|
} \ |
| 1448 |
|
|
\ |
| 1449 |
|
|
void PREFIX##LowerOP_T3_01(_VURegsNum *VUregsn) { \ |
| 1450 |
|
|
PREFIX##LowerOP_T3_01_OPCODE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1451 |
|
|
} \ |
| 1452 |
|
|
\ |
| 1453 |
|
|
void PREFIX##LowerOP_T3_10(_VURegsNum *VUregsn) { \ |
| 1454 |
|
|
PREFIX##LowerOP_T3_10_OPCODE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1455 |
|
|
} \ |
| 1456 |
|
|
\ |
| 1457 |
|
|
void PREFIX##LowerOP_T3_11(_VURegsNum *VUregsn) { \ |
| 1458 |
|
|
PREFIX##LowerOP_T3_11_OPCODE[(VU.code >> 6) & 0x1f](VUregsn); \ |
| 1459 |
|
|
} |
| 1460 |
|
|
|
| 1461 |
|
|
|
| 1462 |
|
|
#ifdef VUM_LOG |
| 1463 |
|
|
|
| 1464 |
|
|
#define IdebugUPPER(VU) \ |
| 1465 |
|
|
VUM_LOG("%s", dis##VU##MicroUF(VU.code, VU.VI[REG_TPC].UL)); |
| 1466 |
|
|
#define IdebugLOWER(VU) \ |
| 1467 |
|
|
VUM_LOG("%s", dis##VU##MicroLF(VU.code, VU.VI[REG_TPC].UL)); |
| 1468 |
|
|
#define _vuExecMicroDebug(VU) \ |
| 1469 |
|
|
VUM_LOG("_vuExecMicro: %8.8x", VU.VI[REG_TPC].UL); |
| 1470 |
|
|
|
| 1471 |
|
|
#else |
| 1472 |
|
|
|
| 1473 |
|
|
#define IdebugUPPER(VU) |
| 1474 |
|
|
#define IdebugLOWER(VU) |
| 1475 |
|
|
#define _vuExecMicroDebug(VU) |
| 1476 |
|
|
|
| 1477 |
|
|
#endif |
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