/[pcsx2_0.9.7]/trunk/pcsx2/VU.h
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Contents of /trunk/pcsx2/VU.h

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Revision 31 - (show annotations) (download)
Tue Sep 7 03:24:11 2010 UTC (10 years, 2 months ago) by william
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committing r3113 initial commit again...
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #pragma once
17 #include "Vif.h"
18
19 enum VURegFlags
20 {
21 REG_STATUS_FLAG = 16,
22 REG_MAC_FLAG = 17,
23 REG_CLIP_FLAG = 18,
24 REG_ACC_FLAG = 19, // dummy flag that indicates that VFACC is written/read (nothing to do with VI[19])
25 REG_R = 20,
26 REG_I = 21,
27 REG_Q = 22,
28 REG_P = 23, // only exists in micromode
29 REG_VF0_FLAG = 24, // dummy flag that indicates VF0 is read (nothing to do with VI[24])
30 REG_TPC = 26,
31 REG_CMSAR0 = 27,
32 REG_FBRST = 28,
33 REG_VPU_STAT = 29,
34 REG_CMSAR1 = 31
35 };
36
37 //interpreter hacks, WIP
38 //#define INT_VUSTALLHACK //some games work without those, big speedup
39 //#define INT_VUDOUBLEHACK
40
41 enum VUStatus {
42 VU_Ready = 0,
43 VU_Run = 1,
44 VU_Stop = 2,
45 };
46
47 union VECTOR {
48 struct {
49 float x,y,z,w;
50 } f;
51 struct {
52 u32 x,y,z,w;
53 } i;
54
55 float F[4];
56
57 u64 UD[2]; //128 bits
58 s64 SD[2];
59 u32 UL[4];
60 s32 SL[4];
61 u16 US[8];
62 s16 SS[8];
63 u8 UC[16];
64 s8 SC[16];
65 };
66
67 struct REG_VI {
68 union {
69 float F;
70 s32 SL;
71 u32 UL;
72 s16 SS[2];
73 u16 US[2];
74 s8 SC[4];
75 u8 UC[4];
76 };
77 u32 padding[3]; // needs padding to make them 128bit; VU0 maps VU1's VI regs as 128bits to addr 0x4xx0 in
78 // VU0 mem, with only lower 16 bits valid, and the upper 112bits are hardwired to 0 (cottonvibes)
79 };
80
81 //#define VUFLAG_BREAKONMFLAG 0x00000001
82 #define VUFLAG_MFLAGSET 0x00000002
83
84 struct fdivPipe {
85 int enable;
86 REG_VI reg;
87 u32 sCycle;
88 u32 Cycle;
89 u32 statusflag;
90 };
91
92 struct efuPipe {
93 int enable;
94 REG_VI reg;
95 u32 sCycle;
96 u32 Cycle;
97 };
98
99 struct fmacPipe {
100 int enable;
101 int reg;
102 int xyzw;
103 u32 sCycle;
104 u32 Cycle;
105 u32 macflag;
106 u32 statusflag;
107 u32 clipflag;
108 };
109
110 struct ialuPipe {
111 int enable;
112 int reg;
113 u32 sCycle;
114 u32 Cycle;
115 };
116
117 struct VURegs {
118 VECTOR VF[32]; // VF and VI need to be first in this struct for proper mapping
119 REG_VI VI[32]; // needs to be 128bit x 32 (cottonvibes)
120 VECTOR ACC;
121 REG_VI q;
122 REG_VI p;
123
124 u32 macflag;
125 u32 statusflag;
126 u32 clipflag;
127
128 u32 cycle;
129 u32 flags;
130
131 void (*vuExec)(VURegs*);
132 VIFregisters *vifRegs;
133
134 u8 *Mem;
135 u8 *Micro;
136
137 u32 code;
138 u32 maxmem;
139 u32 maxmicro;
140
141 u16 branch;
142 u16 ebit;
143 u32 branchpc;
144
145 fmacPipe fmac[8];
146 fdivPipe fdiv;
147 efuPipe efu;
148 ialuPipe ialu[8];
149
150 VURegs() :
151 Mem( NULL )
152 , Micro( NULL )
153 {
154 }
155 };
156 enum VUPipeState
157 {
158 VUPIPE_NONE = 0,
159 VUPIPE_FMAC,
160 VUPIPE_FDIV,
161 VUPIPE_EFU,
162 VUPIPE_IALU,
163 VUPIPE_BRANCH,
164 VUPIPE_XGKICK
165 };
166
167 struct _VURegsNum {
168 u8 pipe; // if 0xff, COP2
169 u8 VFwrite;
170 u8 VFwxyzw;
171 u8 VFr0xyzw;
172 u8 VFr1xyzw;
173 u8 VFread0;
174 u8 VFread1;
175 u32 VIwrite;
176 u32 VIread;
177 int cycles;
178 };
179
180 extern VURegs* g_pVU1;
181 extern __aligned16 VURegs VU0;
182
183 #define VU1 (*g_pVU1)
184
185 extern u32* GET_VU_MEM(VURegs* VU, u32 addr);
186

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