/[pcsx2_0.9.7]/trunk/pcsx2/Sif1.cpp
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Annotation of /trunk/pcsx2/Sif1.cpp

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Revision 62 - (hide annotations) (download)
Tue Sep 7 11:08:22 2010 UTC (9 years, 10 months ago) by william
File size: 8286 byte(s)
Auto Commited Import of: pcsx2-0.9.7-r3738-debug in ./trunk
1 william 31 /* PCSX2 - PS2 Emulator for PCs
2     * Copyright (C) 2002-2010 PCSX2 Dev Team
3     *
4     * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5     * of the GNU Lesser General Public License as published by the Free Software Found-
6     * ation, either version 3 of the License, or (at your option) any later version.
7     *
8     * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9     * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10     * PURPOSE. See the GNU General Public License for more details.
11     *
12     * You should have received a copy of the GNU General Public License along with PCSX2.
13     * If not, see <http://www.gnu.org/licenses/>.
14     */
15    
16     #include "PrecompiledHeader.h"
17    
18     #define _PC_ // disables MIPS opcode macros.
19    
20     #include "IopCommon.h"
21     #include "Sif.h"
22    
23     _sif sif1;
24    
25     static bool done = false;
26    
27 william 62 static __fi void Sif1Init()
28 william 31 {
29     SIF_LOG("SIF1 DMA start...");
30     done = false;
31     sif1.ee.cycles = 0;
32     sif1.iop.cycles = 0;
33     }
34    
35     // Write from the EE to Fifo.
36 william 62 static __fi bool WriteEEtoFifo()
37 william 31 {
38     // There's some data ready to transfer into the fifo..
39    
40     SIF_LOG("Sif 1: Write EE to Fifo");
41 william 62 const int writeSize = min((s32)sif1dma.qwc, sif1.fifo.free() >> 2);
42 william 31
43     tDMA_TAG *ptag;
44    
45 william 62 ptag = sif1dma.getAddr(sif1dma.madr, DMAC_SIF1, false);
46 william 31 if (ptag == NULL)
47     {
48     DevCon.Warning("Write EE to Fifo: ptag == NULL");
49     return false;
50     }
51    
52     sif1.fifo.write((u32*)ptag, writeSize << 2);
53    
54 william 62 sif1dma.madr += writeSize << 4;
55 william 31 sif1.ee.cycles += writeSize; // fixme : BIAS is factored in above
56 william 62 sif1dma.qwc -= writeSize;
57 william 31
58     return true;
59     }
60    
61     // Read from the fifo and write to IOP
62 william 62 static __fi bool WriteFifoToIOP()
63 william 31 {
64     // If we're reading something, continue to do so.
65    
66     SIF_LOG("Sif1: Write Fifo to IOP");
67     const int readSize = min (sif1.iop.counter, sif1.fifo.size);
68    
69     SIF_LOG("Sif 1 IOP doing transfer %04X to %08X", readSize, HW_DMA10_MADR);
70    
71     sif1.fifo.read((u32*)iopPhysMem(hw_dma(10).madr), readSize);
72     psxCpu->Clear(hw_dma(10).madr, readSize);
73     hw_dma(10).madr += readSize << 2;
74     sif1.iop.cycles += readSize >> 2; // fixme: should be >> 4
75     sif1.iop.counter -= readSize;
76    
77     return true;
78     }
79    
80     // Get a tag and process it.
81 william 62 static __fi bool ProcessEETag()
82 william 31 {
83     // Chain mode
84     tDMA_TAG *ptag;
85     SIF_LOG("Sif1: ProcessEETag");
86    
87 william 62 // Process DMA tag at sif1dma.tadr
88     ptag = sif1dma.DMAtransfer(sif1dma.tadr, DMAC_SIF1);
89 william 31 if (ptag == NULL)
90     {
91     Console.WriteLn("Sif1 ProcessEETag: ptag = NULL");
92     return false;
93     }
94    
95 william 62 if (sif1dma.chcr.TTE)
96 william 31 {
97     Console.WriteLn("SIF1 TTE");
98     sif1.fifo.write((u32*)ptag + 2, 2);
99     }
100    
101 william 62 if (sif1dma.chcr.TIE && ptag->IRQ)
102 william 31 {
103     Console.WriteLn("SIF1 TIE");
104     sif1.ee.end = true;
105     }
106    
107     SIF_LOG(wxString(ptag->tag_to_str()).To8BitData());
108     switch (ptag->ID)
109     {
110     case TAG_REFE:
111     sif1.ee.end = true;
112 william 62 sif1dma.madr = ptag[1]._u32;
113     sif1dma.tadr += 16;
114 william 31 break;
115    
116     case TAG_CNT:
117 william 62 sif1dma.madr = sif1dma.tadr + 16;
118     sif1dma.tadr = sif1dma.madr + (sif1dma.qwc << 4);
119 william 31 break;
120    
121     case TAG_NEXT:
122 william 62 sif1dma.madr = sif1dma.tadr + 16;
123     sif1dma.tadr = ptag[1]._u32;
124 william 31 break;
125    
126     case TAG_REF:
127     case TAG_REFS:
128 william 62 sif1dma.madr = ptag[1]._u32;
129     sif1dma.tadr += 16;
130 william 31 break;
131    
132     case TAG_END:
133     sif1.ee.end = true;
134 william 62 sif1dma.madr = sif1dma.tadr + 16;
135     sif1dma.tadr = sif1dma.madr + (sif1dma.qwc << 4);
136 william 31 break;
137    
138     default:
139     Console.WriteLn("Bad addr1 source chain");
140     }
141     return true;
142     }
143    
144     // Write fifo to data, and put it in IOP.
145 william 62 static __fi bool SIFIOPReadTag()
146 william 31 {
147     // Read a tag.
148     sif1.fifo.read((u32*)&sif1.iop.data, 4);
149     //sif1words = (sif1words + 3) & 0xfffffffc; // Round up to nearest 4.
150     SIF_LOG("SIF 1 IOP: dest chain tag madr:%08X wc:%04X id:%X irq:%d",
151     sif1data & 0xffffff, sif1words, sif1tag.ID, sif1tag.IRQ);
152    
153     // Only use the first 24 bits.
154     hw_dma(10).madr = sif1data & 0xffffff;
155    
156     sif1.iop.counter = sif1words;
157     if (sif1tag.IRQ || (sif1tag.ID & 4)) sif1.iop.end = true;
158    
159     return true;
160     }
161    
162     // Stop processing EE, and signal an interrupt.
163 william 62 static __fi void EndEE()
164 william 31 {
165     sif1.ee.end = false;
166     sif1.ee.busy = false;
167     SIF_LOG("Sif 1: End EE");
168    
169     // Voodoocycles : Okami wants around 100 cycles when booting up
170     // Other games reach like 50k cycles here, but the EE will long have given up by then and just retry.
171     // (Cause of double interrupts on the EE)
172     if (sif1.ee.cycles == 0)
173     {
174     SIF_LOG("SIF1 EE: cycles = 0");
175     sif1.ee.cycles = 1;
176     }
177    
178    
179 william 62 CPU_INT(DMAC_SIF1, /*min((int)(*/sif1.ee.cycles*BIAS/*), 384)*/);
180 william 31 }
181    
182     // Stop processing IOP, and signal an interrupt.
183 william 62 static __fi void EndIOP()
184 william 31 {
185     sif1data = 0;
186     sif1.iop.end = false;
187     sif1.iop.busy = false;
188     SIF_LOG("Sif 1: End IOP");
189    
190     //Fixme ( voodoocycles ):
191     //The *24 are needed for ecco the dolphin (CDVD hangs) and silver surfer (Pad not detected)
192     //Greater than *35 break rebooting when trying to play Tekken5 arcade history
193     //Total cycles over 1024 makes SIF too slow to keep up the sound stream in so3...
194     if (sif1.iop.cycles == 0)
195     {
196     DevCon.Warning("SIF1 IOP: cycles = 0");
197     sif1.iop.cycles = 1;
198     }
199     // iop is 1/8th the clock rate of the EE and psxcycles is in words (not quadwords)
200 william 62 PSX_INT(IopEvt_SIF1, /*min((*/sif1.iop.cycles/* * 26*//*), 1024)*/);
201 william 31 }
202    
203     // Handle the EE transfer.
204 william 62 static __fi void HandleEETransfer()
205 william 31 {
206 william 62 if(sif1dma.chcr.STR == false)
207 william 31 {
208     DevCon.Warning("Replacement for irq prevention hack EE SIF1");
209     sif1.ee.end = false;
210     sif1.ee.busy = false;
211     return;
212     }
213 william 62 if (dmacRegs.ctrl.STD == STD_SIF1)
214 william 31 {
215     DevCon.Warning("SIF1 stall control"); // STD == fromSIF1
216     }
217    
218 william 62 /*if (sif1dma.qwc == 0)
219     if (sif1dma.chcr.MOD == NORMAL_MODE)
220 william 31 if (!sif1.ee.end){
221 william 62 DevCon.Warning("sif1 irq prevented CHCR %x QWC %x", sif1dma.chcr, sif1dma.qwc);
222 william 31 done = true;
223     return;
224     }*/
225    
226     // If there's no more to transfer.
227 william 62 if (sif1dma.qwc <= 0)
228 william 31 {
229     // If NORMAL mode or end of CHAIN then stop DMA.
230 william 62 if ((sif1dma.chcr.MOD == NORMAL_MODE) || sif1.ee.end)
231 william 31 {
232     done = true;
233     EndEE();
234     }
235     else
236     {
237     done = false;
238     if (!ProcessEETag()) return;
239     }
240     }
241     else
242     {
243     if (sif1.fifo.free() > 0)
244     {
245     WriteEEtoFifo();
246     }
247     }
248     }
249    
250     // Handle the IOP transfer.
251 william 62 static __fi void HandleIOPTransfer()
252 william 31 {
253     if (sif1.iop.counter > 0)
254     {
255     if (sif1.fifo.size > 0)
256     {
257     WriteFifoToIOP();
258     }
259     }
260    
261     if (sif1.iop.counter <= 0)
262     {
263     if (sif1.iop.end)
264     {
265     done = true;
266     EndIOP();
267     }
268     else if (sif1.fifo.size >= 4)
269     {
270    
271     done = false;
272     SIFIOPReadTag();
273     }
274     }
275     }
276    
277 william 62 static __fi void Sif1End()
278 william 31 {
279     SIF_LOG("SIF1 DMA end...");
280     }
281    
282     // Transfer EE to IOP, putting data in the fifo as an intermediate step.
283 william 62 __fi void SIF1Dma()
284 william 31 {
285     int BusyCheck = 0;
286     Sif1Init();
287    
288     do
289     {
290     //I realise this is very hacky in a way but its an easy way of checking if both are doing something
291     BusyCheck = 0;
292    
293     if (sif1.ee.busy)
294     {
295 william 62 if(sif1.fifo.free() > 0 || (sif1.ee.end == true && sif1dma.qwc == 0))
296     {
297     BusyCheck++;
298     HandleEETransfer();
299     }
300 william 31 }
301    
302     if (sif1.iop.busy)
303     {
304 william 62 if(sif1.fifo.size >= 4 || (sif1.iop.end == true && sif1.iop.counter == 0))
305     {
306     BusyCheck++;
307     HandleIOPTransfer();
308     }
309 william 31 }
310    
311 william 62 } while (/*!done &&*/ BusyCheck > 0);
312 william 31
313     Sif1End();
314     }
315    
316 william 62 __fi void sif1Interrupt()
317 william 31 {
318     HW_DMA10_CHCR &= ~0x01000000; //reset TR flag
319     psxDmaInterrupt2(3);
320     }
321    
322 william 62 __fi void EEsif1Interrupt()
323 william 31 {
324     hwDmacIrq(DMAC_SIF1);
325 william 62 sif1dma.chcr.STR = false;
326 william 31 }
327    
328     // Do almost exactly the same thing as psxDma10 in IopDma.cpp.
329     // Main difference is this checks for iop, where psxDma10 checks for ee.
330 william 62 __fi void dmaSIF1()
331 william 31 {
332 william 62 SIF_LOG(wxString(L"dmaSIF1" + sif1dma.cmqt_to_str()).To8BitData());
333 william 31
334     if (sif1.fifo.readPos != sif1.fifo.writePos)
335     {
336     SIF_LOG("warning, sif1.fifoReadPos != sif1.fifoWritePos");
337     }
338    
339 william 62 //if(sif1dma.chcr.MOD == CHAIN_MODE && sif1dma.qwc > 0) DevCon.Warning(L"SIF1 QWC on Chain CHCR " + sif1dma.chcr.desc());
340 william 31
341     psHu32(SBUS_F240) |= 0x4000;
342     sif1.ee.busy = true;
343    
344 william 62 // Okay, this here is needed currently (r3644).
345     // FFX battles in the thunder plains map die otherwise, Phantasy Star 4 as well
346     // These 2 games could be made playable again by increasing the time the EE or the IOP run,
347     // showing that this is very timing sensible.
348     // Doing this DMA unfortunately brings back an old warning in Legend of Legaia though, but it still works.
349 william 31 if (sif1.iop.busy)
350     {
351     SIF1Dma();
352 william 62 // Do we really want to mess with the SIF flags like that? Nah.
353     //psHu32(SBUS_F240) &= ~0x40;
354     //psHu32(SBUS_F240) &= ~0x100;
355     //psHu32(SBUS_F240) &= ~0x4000;
356 william 31 }
357     }

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