/[pcsx2_0.9.7]/trunk/pcsx2/MemoryTypes.h
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revision 61 by william, Tue Sep 7 03:24:11 2010 UTC revision 62 by william, Tue Sep 7 11:08:22 2010 UTC
# Line 1  Line 1 
1    /*  PCSX2 - PS2 Emulator for PCs
2     *  Copyright (C) 2002-2010  PCSX2 Dev Team
3     *
4     *  PCSX2 is free software: you can redistribute it and/or modify it under the terms
5     *  of the GNU Lesser General Public License as published by the Free Software Found-
6     *  ation, either version 3 of the License, or (at your option) any later version.
7     *
8     *  PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9     *  without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10     *  PURPOSE.  See the GNU General Public License for more details.
11     *
12     *  You should have received a copy of the GNU General Public License along with PCSX2.
13     *  If not, see <http://www.gnu.org/licenses/>.
14     */
15    
16  #pragma once  #pragma once
17    
# Line 21  typedef u8 mem8_t; Line 35  typedef u8 mem8_t;
35  typedef u16 mem16_t;  typedef u16 mem16_t;
36  typedef u32 mem32_t;  typedef u32 mem32_t;
37  typedef u64 mem64_t;  typedef u64 mem64_t;
38  typedef u64 mem128_t;  typedef u128 mem128_t;
39    
40    
41    // --------------------------------------------------------------------------------------
42    //  Future-Planned VTLB pagefault scheme!
43    // --------------------------------------------------------------------------------------
44    // When enabled, the VTLB will use a large-area reserved memory range of 512megs for EE
45    // physical ram/rom access.  The base ram will be committed at 0x00000000, and ROMs will be
46    // at 0x1fc00000, etc.  All memory ranges in between will be uncommitted memory -- which
47    // means that the memory will *not* count against the operating system's physical memory
48    // pool.
49    //
50    // When the VTLB generates memory operations (loads/stores), it will assume that the op
51    // is addressing either RAM or ROM, and by assuming that it can generate a completely efficient
52    // direct memory access (one AND and one MOV instruction).  If the access is to another area of
53    // memory, such as hardware registers or scratchpad, the access will generate a page fault, the
54    // compiled block will be cleared and re-compiled using "full" VTLB translation logic.
55    //
56    #define VTLB_UsePageFaulting 0
57    
58    #if VTLB_UsePageFaulting
59    
60    // The order of the components in this struct *matter* -- it has been laid out so that the
61    // full breadth of PS2 RAM and ROM mappings are directly supported.
62    struct EEVM_MemoryAllocMess
63    {
64            u8 (&Main)[Ps2MemSize::Base];                           // Main memory (hard-wired to 32MB)
65    
66            u8 _padding1[0x1e000000-Ps2MemSize::Base]
67            u8 (&ROM1)[Ps2MemSize::Rom1];                           // DVD player
68    
69            u8 _padding2[0x1e040000-(0x1e000000+Ps2MemSize::Rom1)]
70            u8 (&EROM)[Ps2MemSize::ERom];                           // DVD player extensions
71    
72            u8 _padding3[0x1e400000-(0x1e040000+Ps2MemSize::EROM)]
73            u8 (&ROM2)[Ps2MemSize::Rom2];                           // Chinese extensions
74    
75            u8 _padding4[0x1fc00000-(0x1e040000+Ps2MemSize::Rom2)];
76            u8 (&ROM)[Ps2MemSize::Rom];                             // Boot rom (4MB)
77    };
78    
79    #else
80    
81    struct EEVM_MemoryAllocMess
82    {
83            u8 Scratch[Ps2MemSize::Scratch];                // Scratchpad!
84            u8 Main[Ps2MemSize::Base];                              // Main memory (hard-wired to 32MB)
85            u8 ROM[Ps2MemSize::Rom];                                // Boot rom (4MB)
86            u8 ROM1[Ps2MemSize::Rom1];                              // DVD player
87            u8 ROM2[Ps2MemSize::Rom2];                              // Chinese extensions
88            u8 EROM[Ps2MemSize::ERom];                              // DVD player extensions
89    
90            // Two 1 megabyte (max DMA) buffers for reading and writing to high memory (>32MB).
91            // Such accesses are not documented as causing bus errors but as the memory does
92            // not exist, reads should continue to return 0 and writes should be discarded.
93            // Probably.
94    
95            u8 ZeroRead[_1mb];
96            u8 ZeroWrite[_1mb];
97    };
98    
99    #endif
100    
101    // EE Hardware registers.
102    // DevNote: These are done as a static array instead of a pointer in order to allow for simpler
103    // macros and reference handles to be defined  (we can safely use compile-time references to
104    // registers instead of having to use instance variables).
105    extern __pagealigned u8 eeHw[Ps2MemSize::Hardware];
106    
107    
108    extern EEVM_MemoryAllocMess* eeMem;

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