/[pcsx2_0.9.7]/trunk/pcsx2/IopMem.h
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revision 31 by william, Tue Sep 7 03:24:11 2010 UTC revision 62 by william, Tue Sep 7 11:08:22 2010 UTC
# Line 30  extern const uptr *psxMemRLUT; Line 30  extern const uptr *psxMemRLUT;
30  // Hacky!  This should really never be used, ever, since it bypasses the iop's Hardware  // Hacky!  This should really never be used, ever, since it bypasses the iop's Hardware
31  // Register handler and SPU/DEV/USB maps.  // Register handler and SPU/DEV/USB maps.
32  template<typename T>  template<typename T>
33  static __forceinline T* iopVirtMemW( u32 mem )  static __fi T* iopVirtMemW( u32 mem )
34  {  {
35          return (psxMemWLUT[(mem) >> 16] == 0) ? NULL : (T*)(psxMemWLUT[(mem) >> 16] + ((mem) & 0xffff));          return (psxMemWLUT[(mem) >> 16] == 0) ? NULL : (T*)(psxMemWLUT[(mem) >> 16] + ((mem) & 0xffff));
36  }  }
# Line 42  static __forceinline T* iopVirtMemW( u32 Line 42  static __forceinline T* iopVirtMemW( u32
42  // TLB should be using iopMemRead/Write instead for each individual access.  That ensures  // TLB should be using iopMemRead/Write instead for each individual access.  That ensures
43  // correct handling of page boundary crossings.  // correct handling of page boundary crossings.
44  template<typename T>  template<typename T>
45  static __forceinline const T* iopVirtMemR( u32 mem )  static __fi const T* iopVirtMemR( u32 mem )
46  {  {
47          mem &= 0x1fffffff;          mem &= 0x1fffffff;
48          return (psxMemRLUT[mem >> 16] == 0) ? NULL : (const T*)(psxMemRLUT[mem >> 16] + (mem & 0xffff));          return (psxMemRLUT[mem >> 16] == 0) ? NULL : (const T*)(psxMemRLUT[mem >> 16] + (mem & 0xffff));
49  }  }
50    
51  // Obtains a pointer to the IOP's physical mapping (bypasses the TLB)  // Obtains a pointer to the IOP's physical mapping (bypasses the TLB)
52  static __forceinline u8* iopPhysMem( u32 addr )  static __fi u8* iopPhysMem( u32 addr )
53  {  {
54          return &psxM[addr & 0x1fffff];          return &psxM[addr & 0x1fffff];
55  }  }

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