/[pcsx2_0.9.7]/trunk/pcsx2/IopMem.h
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Contents of /trunk/pcsx2/IopMem.h

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Revision 31 - (show annotations) (download)
Tue Sep 7 03:24:11 2010 UTC (9 years, 11 months ago) by william
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committing r3113 initial commit again...
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #pragma once
17
18 #include "MemoryTypes.h"
19
20 extern u8 *psxM;
21 extern u8 *psxP;
22 extern u8 *psxH;
23 extern u8 *psxS;
24 extern uptr *psxMemWLUT;
25 extern const uptr *psxMemRLUT;
26
27
28 // Obtains a writable pointer into the IOP's memory, with TLB address translation.
29 // If the address maps to read-only memory, NULL is returned.
30 // Hacky! This should really never be used, ever, since it bypasses the iop's Hardware
31 // Register handler and SPU/DEV/USB maps.
32 template<typename T>
33 static __forceinline T* iopVirtMemW( u32 mem )
34 {
35 return (psxMemWLUT[(mem) >> 16] == 0) ? NULL : (T*)(psxMemWLUT[(mem) >> 16] + ((mem) & 0xffff));
36 }
37
38 // Obtains a read-safe pointer into the IOP's physical memory, with TLB address translation.
39 // Returns NULL if the address maps to an invalid/unmapped physical address.
40 //
41 // Hacky! This should really never be used, since anything reading through the
42 // TLB should be using iopMemRead/Write instead for each individual access. That ensures
43 // correct handling of page boundary crossings.
44 template<typename T>
45 static __forceinline const T* iopVirtMemR( u32 mem )
46 {
47 mem &= 0x1fffffff;
48 return (psxMemRLUT[mem >> 16] == 0) ? NULL : (const T*)(psxMemRLUT[mem >> 16] + (mem & 0xffff));
49 }
50
51 // Obtains a pointer to the IOP's physical mapping (bypasses the TLB)
52 static __forceinline u8* iopPhysMem( u32 addr )
53 {
54 return &psxM[addr & 0x1fffff];
55 }
56
57 #define psxSs8(mem) psxS[(mem) & 0x00ff]
58 #define psxSs16(mem) (*(s16*)&psxS[(mem) & 0x00ff])
59 #define psxSs32(mem) (*(s32*)&psxS[(mem) & 0x00ff])
60 #define psxSu8(mem) (*(u8*) &psxS[(mem) & 0x00ff])
61 #define psxSu16(mem) (*(u16*)&psxS[(mem) & 0x00ff])
62 #define psxSu32(mem) (*(u32*)&psxS[(mem) & 0x00ff])
63
64 #define psxPs8(mem) psxP[(mem) & 0xffff]
65 #define psxPs16(mem) (*(s16*)&psxP[(mem) & 0xffff])
66 #define psxPs32(mem) (*(s32*)&psxP[(mem) & 0xffff])
67 #define psxPu8(mem) (*(u8*) &psxP[(mem) & 0xffff])
68 #define psxPu16(mem) (*(u16*)&psxP[(mem) & 0xffff])
69 #define psxPu32(mem) (*(u32*)&psxP[(mem) & 0xffff])
70
71 #define psxHs8(mem) psxH[(mem) & 0xffff]
72 #define psxHs16(mem) (*(s16*)&psxH[(mem) & 0xffff])
73 #define psxHs32(mem) (*(s32*)&psxH[(mem) & 0xffff])
74 #define psxHu8(mem) (*(u8*) &psxH[(mem) & 0xffff])
75 #define psxHu16(mem) (*(u16*)&psxH[(mem) & 0xffff])
76 #define psxHu32(mem) (*(u32*)&psxH[(mem) & 0xffff])
77
78 extern void psxMemAlloc();
79 extern void psxMemReset();
80 extern void psxMemShutdown();
81
82 extern u8 __fastcall iopMemRead8 (u32 mem);
83 extern u16 __fastcall iopMemRead16(u32 mem);
84 extern u32 __fastcall iopMemRead32(u32 mem);
85 extern void __fastcall iopMemWrite8 (u32 mem, u8 value);
86 extern void __fastcall iopMemWrite16(u32 mem, u16 value);
87 extern void __fastcall iopMemWrite32(u32 mem, u32 value);
88
89 namespace IopMemory
90 {
91 // Sif functions not made yet (will for future Iop improvements):
92 extern mem8_t __fastcall SifRead8( u32 iopaddr );
93 extern mem16_t __fastcall SifRead16( u32 iopaddr );
94 extern mem32_t __fastcall SifRead32( u32 iopaddr );
95
96 extern void __fastcall SifWrite8( u32 iopaddr, mem8_t data );
97 extern void __fastcall SifWrite16( u32 iopaddr, mem16_t data );
98 extern void __fastcall SifWrite32( u32 iopaddr, mem32_t data );
99
100 extern mem8_t __fastcall iopHwRead8_generic( u32 addr );
101 extern mem16_t __fastcall iopHwRead16_generic( u32 addr );
102 extern mem32_t __fastcall iopHwRead32_generic( u32 addr );
103 extern void __fastcall iopHwWrite8_generic( u32 addr, mem8_t val );
104 extern void __fastcall iopHwWrite16_generic( u32 addr, mem16_t val );
105 extern void __fastcall iopHwWrite32_generic( u32 addr, mem32_t val );
106
107
108 extern mem8_t __fastcall iopHwRead8_Page1( u32 iopaddr );
109 extern mem8_t __fastcall iopHwRead8_Page3( u32 iopaddr );
110 extern mem8_t __fastcall iopHwRead8_Page8( u32 iopaddr );
111 extern mem16_t __fastcall iopHwRead16_Page1( u32 iopaddr );
112 extern mem16_t __fastcall iopHwRead16_Page3( u32 iopaddr );
113 extern mem16_t __fastcall iopHwRead16_Page8( u32 iopaddr );
114 extern mem32_t __fastcall iopHwRead32_Page1( u32 iopaddr );
115 extern mem32_t __fastcall iopHwRead32_Page3( u32 iopaddr );
116 extern mem32_t __fastcall iopHwRead32_Page8( u32 iopaddr );
117
118 extern void __fastcall iopHwWrite8_Page1( u32 iopaddr, mem8_t data );
119 extern void __fastcall iopHwWrite8_Page3( u32 iopaddr, mem8_t data );
120 extern void __fastcall iopHwWrite8_Page8( u32 iopaddr, mem8_t data );
121 extern void __fastcall iopHwWrite16_Page1( u32 iopaddr, mem16_t data );
122 extern void __fastcall iopHwWrite16_Page3( u32 iopaddr, mem16_t data );
123 extern void __fastcall iopHwWrite16_Page8( u32 iopaddr, mem16_t data );
124 extern void __fastcall iopHwWrite32_Page1( u32 iopaddr, mem32_t data );
125 extern void __fastcall iopHwWrite32_Page3( u32 iopaddr, mem32_t data );
126 extern void __fastcall iopHwWrite32_Page8( u32 iopaddr, mem32_t data );
127 }

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