/[pcsx2_0.9.7]/trunk/pcsx2/IPU/IPU.h
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Contents of /trunk/pcsx2/IPU/IPU.h

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Revision 62 - (show annotations) (download)
Tue Sep 7 11:08:22 2010 UTC (9 years, 5 months ago) by william
File MIME type: text/plain
File size: 5062 byte(s)
Auto Commited Import of: pcsx2-0.9.7-r3738-debug in ./trunk
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #pragma once
17
18 #include "IPU_Fifo.h"
19
20 #define ipumsk( src ) ( (src) & 0xff )
21 #define ipucase( src ) case ipumsk(src)
22
23 #define IPU_INT_TO( cycles ) if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
24 #define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles )
25
26 #define IPU_FORCEINLINE __fi
27
28 //
29 // Bitfield Structures
30 //
31
32 struct tIPU_CMD
33 {
34 u32 DATA;
35 u32 BUSY;
36 };
37
38 union tIPU_CTRL {
39 struct {
40 u32 IFC : 4; // Input FIFO counter
41 u32 OFC : 4; // Output FIFO counter
42 u32 CBP : 6; // Coded block pattern
43 u32 ECD : 1; // Error code pattern
44 u32 SCD : 1; // Start code detected
45 u32 IDP : 2; // Intra DC precision
46 u32 resv0 : 2;
47 u32 AS : 1; // Alternate scan
48 u32 IVF : 1; // Intra VLC format
49 u32 QST : 1; // Q scale step
50 u32 MP1 : 1; // MPEG1 bit stream
51 u32 PCT : 3; // Picture Type
52 u32 resv1 : 3;
53 u32 RST : 1; // Reset
54 u32 BUSY : 1; // Busy
55 };
56 u32 _u32;
57
58 tIPU_CTRL( u32 val ) { _u32 = val; }
59
60 // CTRL = the first 16 bits of ctrl [0x8000ffff], + value for the next 16 bits,
61 // minus the reserved bits. (18-19; 27-29) [0x47f30000]
62 void write(u32 value) { _u32 = (value & 0x47f30000) | (_u32 & 0x8000ffff); }
63
64 bool test(u32 flags) const { return !!(_u32 & flags); }
65 void set_flags(u32 flags) { _u32 |= flags; }
66 void clear_flags(u32 flags) { _u32 &= ~flags; }
67 void reset() { _u32 = 0; }
68 };
69
70 struct tIPU_BP {
71 u32 BP; // Bit stream point
72 u16 IFC; // Input FIFO counter
73 u8 FP; // FIFO point
74 u8 bufferhasnew; // Always 0.
75 wxString desc() const
76 {
77 return wxsFormat(L"Ipu BP: bp = 0x%x, IFC = 0x%x, FP = 0x%x.", BP, IFC, FP);
78 }
79 };
80
81 union tIPU_CMD_IDEC
82 {
83 struct
84 {
85 u32 FB : 6;
86 u32 UN2 :10;
87 u32 QSC : 5;
88 u32 UN1 : 3;
89 u32 DTD : 1;
90 u32 SGN : 1;
91 u32 DTE : 1;
92 u32 OFM : 1;
93 u32 cmd : 4;
94 };
95
96 u32 _u32;
97
98 tIPU_CMD_IDEC( u32 val ) { _u32 = val; }
99
100 bool test(u32 flags) const { return !!(_u32 & flags); }
101 void set_flags(u32 flags) { _u32 |= flags; }
102 void clear_flags(u32 flags) { _u32 &= ~flags; }
103 void reset() { _u32 = 0; }
104 void log() const;
105 };
106
107 union tIPU_CMD_BDEC
108 {
109 struct
110 {
111 u32 FB : 6;
112 u32 UN2 :10;
113 u32 QSC : 5;
114 u32 UN1 : 4;
115 u32 DT : 1;
116 u32 DCR : 1;
117 u32 MBI : 1;
118 u32 cmd : 4;
119 };
120 u32 _u32;
121
122 tIPU_CMD_BDEC( u32 val ) { _u32 = val; }
123
124 bool test(u32 flags) const { return !!(_u32 & flags); }
125 void set_flags(u32 flags) { _u32 |= flags; }
126 void clear_flags(u32 flags) { _u32 &= ~flags; }
127 void reset() { _u32 = 0; }
128 void log(int s_bdec) const;
129 };
130
131 union tIPU_CMD_CSC
132 {
133 struct
134 {
135 u32 MBC :11;
136 u32 UN2 :15;
137 u32 DTE : 1;
138 u32 OFM : 1;
139 u32 cmd : 4;
140 };
141 u32 _u32;
142
143 tIPU_CMD_CSC( u32 val ){ _u32 = val; }
144
145 bool test(u32 flags) const { return !!(_u32 & flags); }
146 void set_flags(u32 flags) { _u32 |= flags; }
147 void clear_flags(u32 flags) { _u32 &= ~flags; }
148 void reset() { _u32 = 0; }
149 void log_from_YCbCr() const;
150 void log_from_RGB32() const;
151 };
152
153 enum SCE_IPU
154 {
155 SCE_IPU_BCLR = 0x0
156 , SCE_IPU_IDEC
157 , SCE_IPU_BDEC
158 , SCE_IPU_VDEC
159 , SCE_IPU_FDEC
160 , SCE_IPU_SETIQ
161 , SCE_IPU_SETVQ
162 , SCE_IPU_CSC
163 , SCE_IPU_PACK
164 , SCE_IPU_SETTH
165 };
166
167 struct IPUregisters {
168 tIPU_CMD cmd;
169 u32 dummy0[2];
170 tIPU_CTRL ctrl;
171 u32 dummy1[3];
172 u32 ipubp;
173 u32 dummy2[3];
174 u32 top;
175 u32 topbusy;
176 u32 dummy3[2];
177 };
178
179 struct tIPU_cmd
180 {
181 int index;
182 int pos[6];
183 union {
184 struct {
185 u32 OPTION : 28;
186 u32 CMD : 4;
187 };
188 u32 current;
189 };
190 void clear()
191 {
192 memzero(pos);
193 index = 0;
194 current = 0xffffffff;
195 }
196 wxString desc() const
197 {
198 return wxsFormat(L"Ipu cmd: index = 0x%x, current = 0x%x, pos[0] = 0x%x, pos[1] = 0x%x",
199 index, current, pos[0], pos[1]);
200 }
201 };
202
203 static IPUregisters& ipuRegs = (IPUregisters&)eeHw[0x2000];
204
205 extern tIPU_cmd ipu_cmd;
206 extern int coded_block_pattern;
207
208 extern int ipuInit();
209 extern void ipuReset();
210
211 extern u32 ipuRead32(u32 mem);
212 extern u64 ipuRead64(u32 mem);
213 extern bool ipuWrite32(u32 mem,u32 value);
214 extern bool ipuWrite64(u32 mem,u64 value);
215
216 extern void IPUCMD_WRITE(u32 val);
217 extern void ipuSoftReset();
218 extern void IPUProcessInterrupt();
219
220 extern u16 __fastcall FillInternalBuffer(u32 * pointer, u32 advance, u32 size);
221 extern u8 __fastcall getBits128(u8 *address, u32 advance);
222 extern u8 __fastcall getBits64(u8 *address, u32 advance);
223 extern u8 __fastcall getBits32(u8 *address, u32 advance);
224 extern u8 __fastcall getBits16(u8 *address, u32 advance);
225 extern u8 __fastcall getBits8(u8 *address, u32 advance);
226

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