1 |
william |
31 |
/* PCSX2 - PS2 Emulator for PCs |
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* Copyright (C) 2002-2010 PCSX2 Dev Team |
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* |
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms |
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* of the GNU Lesser General Public License as published by the Free Software Found- |
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* ation, either version 3 of the License, or (at your option) any later version. |
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* |
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; |
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR |
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* PURPOSE. See the GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License along with PCSX2. |
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* If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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#include "PrecompiledHeader.h" |
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#include "Common.h" |
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#include "GS.h" |
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#include "Gif.h" |
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#include "Vif_Dma.h" |
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#include "iR5900.h" |
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using std::min; |
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// A three-way toggle used to determine if the GIF is stalling (transferring) or done (finished). |
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// Should be a gifstate_t rather then int, but I don't feel like possibly interfering with savestates right now. |
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static int gifstate = GIF_STATE_READY; |
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static bool gspath3done = false; |
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static u32 gscycles = 0, prevcycles = 0, mfifocycles = 0; |
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static u32 gifqwc = 0; |
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static bool gifmfifoirq = false; |
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william |
62 |
//Just some temporary bits to store Path1 transfers if another is in progress. |
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__aligned16 u8 Path1Buffer[0x1000000]; |
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u32 Path1WritePos = 0; |
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u32 Path1ReadPos = 0; |
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static __fi void clearFIFOstuff(bool full) |
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william |
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{ |
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if (full) |
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william |
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CSRreg.FIFO = CSR_FIFO_FULL; |
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william |
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else |
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william |
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CSRreg.FIFO = CSR_FIFO_EMPTY; |
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william |
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} |
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william |
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extern bool SIGNAL_IMR_Pending; |
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william |
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void gsPath1Interrupt() |
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william |
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{ |
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william |
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//DevCon.Warning("Path1 flush W %x, R %x", Path1WritePos, Path1ReadPos); |
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william |
401 |
if((gifRegs.stat.APATH <= GIF_APATH1 || (gifRegs.stat.IP3 == true)) && Path1WritePos > 0 && !gifRegs.stat.PSE && SIGNAL_IMR_Pending == false) |
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william |
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{ |
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gifRegs.stat.P1Q = false; |
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if (uint size = (Path1WritePos - Path1ReadPos)) |
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{ |
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GetMTGS().PrepDataPacket(GIF_PATH_1, size); |
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//DevCon.Warning("Flush Size = %x", size); |
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william |
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while(size > 0 && SIGNAL_IMR_Pending == false) |
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william |
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{ |
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uint count = GIFPath_CopyTag(GIF_PATH_1, ((u128*)Path1Buffer) + Path1ReadPos, size); |
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Path1ReadPos += count; |
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size -= count; |
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if(GSTransferStatus.PTH1 == STOPPED_MODE) |
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{ |
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gifRegs.stat.OPH = false; |
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gifRegs.stat.APATH = GIF_APATH_IDLE; |
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} |
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} |
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GetMTGS().SendDataPacket(); |
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if(Path1ReadPos == Path1WritePos) |
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{ |
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Path1WritePos = Path1ReadPos = 0; |
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william |
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} |
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else |
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{ |
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//DevCon.Warning("Queue quitting early due to signal or EOP %x", size); |
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gifRegs.stat.P1Q = true; |
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william |
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} |
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} |
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} |
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else |
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{ |
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if(gifRegs.stat.PSE) DevCon.Warning("Path1 paused by GIF_CTRL"); |
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william |
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if(gifRegs.stat.P1Q == false && Path1ReadPos != Path1WritePos) |
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{ |
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DevCon.Warning("Wa's Goin on ere then?"); |
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gifRegs.stat.P1Q = true; |
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} |
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william |
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//DevCon.Warning("Looping??? IP3 %x APATH %x OPH %x", gifRegs.stat.IP3, gifRegs.stat.APATH, gifRegs.stat.OPH); |
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william |
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//if(!(cpuRegs.interrupt & (1<<28)) && Path1WritePos > 0)CPU_INT(28, 128); |
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} |
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} |
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extern bool SIGNAL_IMR_Pending; |
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__fi void gsInterrupt() |
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{ |
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william |
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GIF_LOG("gsInterrupt caught!"); |
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william |
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|
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william |
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if (dmacRegs.ctrl.MFD == MFD_GIF) // GIF MFIFO |
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{ |
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//Console.WriteLn("GIF MFIFO"); |
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gifMFIFOInterrupt(); |
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return; |
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} |
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william |
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if(SIGNAL_IMR_Pending == true) |
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william |
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{ |
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william |
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//DevCon.Warning("Path 3 Paused"); |
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CPU_INT(DMAC_GIF, 128); |
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william |
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return; |
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} |
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william |
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if(GSTransferStatus.PTH3 == PENDINGSTOP_MODE) |
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{ |
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william |
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GSTransferStatus.PTH3 = STOPPED_MODE; |
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william |
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if(gifRegs.stat.APATH == GIF_APATH3) |
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{ |
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gifRegs.stat.APATH = GIF_APATH_IDLE; |
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gifRegs.stat.OPH = false; |
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if(gifRegs.stat.P1Q) gsPath1Interrupt(); |
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} |
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william |
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} |
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william |
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|
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william |
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if (!(gifch.chcr.STR)) |
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william |
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{ |
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william |
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//Console.WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", gifch.chcr._u32, gifch.qwc, done); |
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return; |
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william |
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} |
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william |
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if ((gifch.qwc > 0) || (!gspath3done)) |
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william |
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{ |
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william |
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if (!dmacRegs.ctrl.DMAE) |
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william |
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{ |
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Console.Warning("gs dma masked, re-scheduling..."); |
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// re-raise the int shortly in the future |
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CPU_INT( DMAC_GIF, 64 ); |
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return; |
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} |
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GIFdma(); |
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return; |
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} |
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gspath3done = false; |
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gscycles = 0; |
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william |
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gifch.chcr.STR = false; |
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william |
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|
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william |
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//// |
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/*gifRegs.stat.OPH = false; |
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GSTransferStatus.PTH3 = STOPPED_MODE; |
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gifRegs.stat.APATH = GIF_APATH_IDLE;*/ |
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//// |
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gifRegs.stat.clear_flags(GIF_STAT_FQC); |
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william |
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clearFIFOstuff(false); |
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hwDmacIrq(DMAC_GIF); |
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william |
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DMA_LOG("GIF DMA End"); |
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william |
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} |
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static u32 WRITERING_DMA(u32 *pMem, u32 qwc) |
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{ |
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william |
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GetMTGS().PrepDataPacket(GIF_PATH_3, qwc); |
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uint size = GIFPath_CopyTag(GIF_PATH_3, (u128*)pMem, qwc ); |
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william |
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GetMTGS().SendDataPacket(); |
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return size; |
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} |
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static u32 WRITERING_DMA(tDMA_TAG *pMem, u32 qwc) |
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{ |
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return WRITERING_DMA((u32*)pMem, qwc); |
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} |
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int _GIFchain() |
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{ |
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tDMA_TAG *pMem; |
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william |
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pMem = dmaGetAddr(gifch.madr, false); |
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william |
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if (pMem == NULL) |
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{ |
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// reset path3, fixes dark cloud 2 |
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GIFPath_Clear( GIF_PATH_3 ); |
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//must increment madr and clear qwc, else it loops |
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william |
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gifch.madr += gifch.qwc * 16; |
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gifch.qwc = 0; |
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william |
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Console.Warning( "Hackfix - NULL GIFchain" ); |
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return -1; |
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} |
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william |
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return WRITERING_DMA(pMem, gifch.qwc); |
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william |
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} |
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william |
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static __fi void GIFchain() |
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william |
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{ |
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// qwc check now done outside this function |
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// Voodoocycles |
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// >> 2 so Drakan and Tekken 5 don't mess up in some PATH3 transfer. Cycles to interrupt were getting huge.. |
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william |
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/*if (gifch.qwc)*/ gscycles+= ( _GIFchain() * BIAS); /* guessing */ |
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william |
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} |
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william |
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static __fi bool checkTieBit(tDMA_TAG* &ptag) |
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william |
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{ |
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william |
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if (gifch.chcr.TIE && ptag->IRQ) |
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william |
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{ |
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GIF_LOG("dmaIrq Set"); |
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gspath3done = true; |
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return true; |
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} |
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return false; |
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} |
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william |
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static __fi tDMA_TAG* ReadTag() |
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william |
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{ |
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william |
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tDMA_TAG* ptag = dmaGetAddr(gifch.tadr, false); //Set memory pointer to TADR |
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william |
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|
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william |
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if (!(gifch.transfer("Gif", ptag))) return NULL; |
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william |
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|
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william |
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gifch.madr = ptag[1]._u32; //MADR = ADDR field + SPR |
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william |
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gscycles += 2; // Add 1 cycles from the QW read for the tag |
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william |
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gspath3done = hwDmacSrcChainWithStack(gifch, ptag->ID); |
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william |
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return ptag; |
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} |
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william |
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static __fi tDMA_TAG* ReadTag2() |
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william |
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{ |
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william |
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tDMA_TAG* ptag = dmaGetAddr(gifch.tadr, false); //Set memory pointer to TADR |
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william |
31 |
|
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william |
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gifch.unsafeTransfer(ptag); |
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gifch.madr = ptag[1]._u32; |
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william |
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|
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william |
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gspath3done = hwDmacSrcChainWithStack(gifch, ptag->ID); |
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william |
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return ptag; |
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} |
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william |
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bool CheckPaths(int Channel) |
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{ |
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william |
401 |
if((GSTransferStatus.PTH3 == IMAGE_MODE && gifRegs.mode.IMT) /*|| GSTransferStatus.PTH3 == WAITING_MODE*/) |
252 |
william |
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{ |
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if((gifRegs.stat.P1Q == true || gifRegs.stat.P2Q == true) || (gifRegs.stat.APATH > GIF_APATH_IDLE && gifRegs.stat.APATH < GIF_APATH3)) |
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{ |
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if((vif1.cmd & 0x7f) != 0x51 || gifRegs.stat.P1Q == true) |
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{ |
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william |
280 |
//DevCon.Warning("GIF Stall 1 P1Q %x P2Q %x APATH %x PTH3 %x vif1cmd %x", gifRegs.stat.P1Q, gifRegs.stat.P2Q, gifRegs.stat.APATH, GSTransferStatus.PTH3, vif1.cmd); |
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william |
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gifRegs.stat.IP3 = true; |
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if(gifRegs.stat.P1Q) gsPath1Interrupt(); |
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CPU_INT(DMAC_GIF, 16); |
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return false; |
262 |
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} |
263 |
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} |
264 |
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} |
265 |
william |
401 |
else if(GSTransferStatus.PTH3 == STOPPED_MODE) |
266 |
william |
62 |
{ |
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//This should cover both scenarios, as DIRECTHL doesn't gain priority when image mode is running (PENDINGIMAGE_MODE == fininshed). |
268 |
william |
401 |
if((gifRegs.stat.P1Q == true || gifRegs.stat.P2Q == true) || (gifRegs.stat.APATH > GIF_APATH_IDLE && gifRegs.stat.APATH < GIF_APATH3) || vif1Regs.stat.VGW == true) |
269 |
william |
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{ |
270 |
william |
280 |
//DevCon.Warning("GIF Stall 2 P1Q %x P2Q %x APATH %x PTH3 %x vif1cmd %x", gifRegs.stat.P1Q, gifRegs.stat.P2Q, gifRegs.stat.APATH, GSTransferStatus.PTH3, vif1.cmd); |
271 |
william |
62 |
gifRegs.stat.IP3 = true; |
272 |
william |
401 |
if(gifRegs.stat.P1Q) gsPath1Interrupt(); |
273 |
william |
62 |
CPU_INT(DMAC_GIF, 16); |
274 |
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return false; |
275 |
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} |
276 |
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} |
277 |
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278 |
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gifRegs.stat.IP3 = false; |
279 |
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return true; |
280 |
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} |
281 |
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282 |
william |
31 |
void GIFdma() |
283 |
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{ |
284 |
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tDMA_TAG *ptag; |
285 |
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286 |
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gscycles = prevcycles; |
287 |
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288 |
william |
62 |
if (gifRegs.ctrl.PSE) // temporarily stop |
289 |
william |
31 |
{ |
290 |
william |
62 |
Console.WriteLn("Gif dma temp paused? (non MFIFO GIF)"); |
291 |
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CPU_INT(DMAC_GIF, 16); |
292 |
william |
31 |
return; |
293 |
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} |
294 |
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|
295 |
william |
62 |
if ((dmacRegs.ctrl.STD == STD_GIF) && (prevcycles != 0)) |
296 |
william |
31 |
{ |
297 |
william |
62 |
//Console.WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3, gifch.madr, psHu32(DMAC_STADR)); |
298 |
william |
31 |
|
299 |
william |
62 |
if ((gifch.madr + (gifch.qwc * 16)) > dmacRegs.stadr.ADDR) |
300 |
william |
31 |
{ |
301 |
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CPU_INT(DMAC_GIF, 4); |
302 |
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gscycles = 0; |
303 |
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return; |
304 |
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} |
305 |
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306 |
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prevcycles = 0; |
307 |
william |
62 |
gifch.qwc = 0; |
308 |
william |
31 |
} |
309 |
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310 |
william |
62 |
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311 |
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312 |
william |
401 |
if ((gifch.chcr.MOD == CHAIN_MODE) && (!gspath3done) && gifch.qwc == 0) // Chain Mode |
313 |
william |
31 |
{ |
314 |
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ptag = ReadTag(); |
315 |
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if (ptag == NULL) return; |
316 |
william |
62 |
//DevCon.Warning("GIF Reading Tag MSK = %x", vif1Regs.mskpath3); |
317 |
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gifch.qwc, ptag->ID, gifch.madr, gifch.tadr); |
318 |
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gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3] |
319 |
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if (dmacRegs.ctrl.STD == STD_GIF) |
320 |
william |
31 |
{ |
321 |
william |
62 |
// there are still bugs, need to also check if gifch.madr +16*qwc >= stadr, if not, stall |
322 |
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if (!gspath3done && ((gifch.madr + (gifch.qwc * 16)) > dmacRegs.stadr.ADDR) && (ptag->ID == TAG_REFS)) |
323 |
william |
31 |
{ |
324 |
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// stalled. |
325 |
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// We really need to test this. Pay attention to prevcycles, as it used to trigger GIFchains in the code above. (rama) |
326 |
william |
62 |
//Console.WriteLn("GS Stall Control start Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3,gifch.madr, psHu32(DMAC_STADR)); |
327 |
william |
31 |
prevcycles = gscycles; |
328 |
william |
62 |
gifch.tadr -= 16; |
329 |
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gifch.qwc = 0; |
330 |
william |
31 |
hwDmacIrq(DMAC_STALL_SIS); |
331 |
|
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CPU_INT(DMAC_GIF, gscycles); |
332 |
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gscycles = 0; |
333 |
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return; |
334 |
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} |
335 |
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} |
336 |
|
|
|
337 |
|
|
checkTieBit(ptag); |
338 |
william |
401 |
} |
339 |
|
|
|
340 |
|
|
clearFIFOstuff(true); |
341 |
|
|
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3] |
342 |
|
|
|
343 |
|
|
if (vif1Regs.mskpath3 || gifRegs.mode.M3R) |
344 |
|
|
{ |
345 |
|
|
if (GSTransferStatus.PTH3 == STOPPED_MODE) |
346 |
william |
62 |
{ |
347 |
william |
401 |
MSKPATH3_LOG("Path3 Paused by VIF QWC %x", gifch.qwc); |
348 |
|
|
|
349 |
|
|
if(gifch.qwc == 0) CPU_INT(DMAC_GIF, 4); |
350 |
|
|
else gifRegs.stat.set_flags(GIF_STAT_P3Q); |
351 |
william |
62 |
return; |
352 |
william |
401 |
} |
353 |
william |
31 |
} |
354 |
|
|
|
355 |
william |
401 |
// Transfer Dn_QWC from Dn_MADR to GIF |
356 |
|
|
if (gifch.qwc > 0) // Normal Mode |
357 |
|
|
{ |
358 |
|
|
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3] |
359 |
|
|
|
360 |
|
|
gifRegs.stat.set_flags(GIF_STAT_P3Q); |
361 |
|
|
|
362 |
|
|
if(CheckPaths(DMAC_GIF) == false) |
363 |
|
|
return; |
364 |
|
|
|
365 |
|
|
gifRegs.stat.clear_flags(GIF_STAT_P3Q); |
366 |
|
|
|
367 |
|
|
GIFchain(); //Transfers the data set by the switch |
368 |
|
|
CPU_INT(DMAC_GIF, gscycles); |
369 |
|
|
return; |
370 |
|
|
} |
371 |
|
|
|
372 |
william |
31 |
prevcycles = 0; |
373 |
william |
62 |
CPU_INT(DMAC_GIF, gscycles); |
374 |
|
|
gifRegs.stat.FQC = min((u16)0x10, gifch.qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3] |
375 |
william |
31 |
} |
376 |
|
|
|
377 |
|
|
void dmaGIF() |
378 |
|
|
{ |
379 |
|
|
//We used to add wait time for the buffer to fill here, fixing some timing problems in path 3 masking |
380 |
|
|
//It takes the time of 24 QW for the BUS to become ready - The Punisher And Streetball |
381 |
william |
62 |
//DevCon.Warning("dmaGIFstart chcr = %lx, madr = %lx, qwc = %lx\n tadr = %lx, asr0 = %lx, asr1 = %lx", gifch.chcr._u32, gifch.madr, gifch.qwc, gifch.tadr, gifch.asr0, gifch.asr1); |
382 |
william |
31 |
|
383 |
|
|
gspath3done = false; // For some reason this doesn't clear? So when the system starts the thread, we will clear it :) |
384 |
|
|
|
385 |
william |
62 |
gifRegs.stat.FQC |= 0x10; // hack ;) |
386 |
william |
31 |
|
387 |
william |
62 |
if (gifch.chcr.MOD == NORMAL_MODE) { //Else it really is a normal transfer and we want to quit, else it gets confused with chains |
388 |
|
|
gspath3done = true; |
389 |
|
|
} |
390 |
william |
31 |
clearFIFOstuff(true); |
391 |
|
|
|
392 |
william |
62 |
if(gifch.chcr.MOD == CHAIN_MODE && gifch.qwc > 0) |
393 |
william |
31 |
{ |
394 |
william |
62 |
//DevCon.Warning(L"GIF QWC on Chain " + gifch.chcr.desc()); |
395 |
|
|
if ((gifch.chcr.tag().ID == TAG_REFE) || (gifch.chcr.tag().ID == TAG_END)) |
396 |
|
|
{ |
397 |
|
|
gspath3done = true; |
398 |
|
|
} |
399 |
william |
31 |
} |
400 |
|
|
|
401 |
william |
280 |
|
402 |
william |
31 |
|
403 |
william |
280 |
gsInterrupt(); |
404 |
william |
31 |
} |
405 |
|
|
|
406 |
william |
280 |
static u16 QWCinGIFMFIFO(u32 DrainADDR) |
407 |
|
|
{ |
408 |
|
|
u32 ret; |
409 |
|
|
|
410 |
|
|
|
411 |
|
|
GIF_LOG("GIF MFIFO Requesting %x QWC from the MFIFO Base %x, SPR MADR %x Drain %x", gifch.qwc, dmacRegs.rbor.ADDR, spr0ch.madr, DrainADDR); |
412 |
|
|
//Calculate what we have in the fifo. |
413 |
|
|
if(DrainADDR <= spr0ch.madr) |
414 |
|
|
{ |
415 |
|
|
//Drain is below the tadr, calculate the difference between them |
416 |
|
|
ret = (spr0ch.madr - DrainADDR) >> 4; |
417 |
|
|
} |
418 |
|
|
else |
419 |
|
|
{ |
420 |
|
|
u32 limit = dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16; |
421 |
|
|
//Drain is higher than SPR so it has looped round, |
422 |
|
|
//calculate from base to the SPR tag addr and what is left in the top of the ring |
423 |
|
|
ret = ((spr0ch.madr - dmacRegs.rbor.ADDR) + (limit - DrainADDR)) >> 4; |
424 |
|
|
} |
425 |
|
|
GIF_LOG("%x Available of the %x requested", ret, gifch.qwc); |
426 |
|
|
if((s32)ret < 0) DevCon.Warning("GIF Returning %x!", ret); |
427 |
|
|
return ret; |
428 |
|
|
} |
429 |
|
|
|
430 |
william |
31 |
// called from only one location, so forceinline it: |
431 |
william |
62 |
static __fi bool mfifoGIFrbTransfer() |
432 |
william |
31 |
{ |
433 |
william |
280 |
u16 mfifoqwc = min(QWCinGIFMFIFO(gifch.madr), gifch.qwc); |
434 |
william |
31 |
u32 *src; |
435 |
|
|
|
436 |
william |
280 |
if(mfifoqwc == 0) return true; //Lets skip all this, we don't have the data |
437 |
|
|
|
438 |
william |
62 |
GetMTGS().PrepDataPacket(GIF_PATH_3, mfifoqwc); |
439 |
|
|
|
440 |
|
|
// TODO (minor optimization): The new GIFpath parser can do rather efficient wrapping of |
441 |
|
|
// its own internally now. We just need to groom a version of it that can wrap around MFIFO |
442 |
|
|
// memory similarly to how it wraps VU1 memory on PATH1. |
443 |
william |
280 |
GIF_LOG("MFIFO QWC to Transfer %x", mfifoqwc); |
444 |
william |
31 |
/* Check if the transfer should wrap around the ring buffer */ |
445 |
william |
280 |
if ( (gifch.madr + (mfifoqwc * 16)) > (dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16)) |
446 |
william |
31 |
{ |
447 |
william |
62 |
uint s1 = ((dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16) - gifch.madr) >> 4; |
448 |
william |
31 |
uint s2 = (mfifoqwc - s1); |
449 |
william |
280 |
GIF_LOG("Split transfer doing %x QWC of %x Total QWC", s1, mfifoqwc); |
450 |
william |
31 |
/* it does (wrap around), so first copy 's1' bytes from 'addr' to 'data' */ |
451 |
william |
62 |
/* and second copy 's2' bytes from 'maddr' to '&data[s1]' */ |
452 |
william |
280 |
|
453 |
|
|
gifch.madr = dmacRegs.rbor.ADDR + (gifch.madr & dmacRegs.rbsr.RMSK); |
454 |
william |
62 |
src = (u32*)PSM(gifch.madr); |
455 |
william |
31 |
if (src == NULL) return false; |
456 |
william |
62 |
uint copied = GIFPath_CopyTag(GIF_PATH_3, (u128*)src, s1); |
457 |
william |
31 |
|
458 |
william |
62 |
if (copied == s1) // but only copy second if first didn't abort prematurely for some reason. |
459 |
william |
31 |
{ |
460 |
william |
280 |
GIF_LOG("Transferring last %x QWC", s2); |
461 |
william |
62 |
src = (u32*)PSM(dmacRegs.rbor.ADDR); |
462 |
william |
280 |
gifch.madr = dmacRegs.rbor.ADDR; |
463 |
william |
31 |
if (src == NULL) return false; |
464 |
william |
62 |
copied += GIFPath_CopyTag(GIF_PATH_3, (u128*)src, s2); |
465 |
william |
31 |
} |
466 |
|
|
|
467 |
william |
62 |
mfifoqwc = copied; |
468 |
william |
280 |
GIF_LOG("Copied %x QWC, %x QWC Left", mfifoqwc, gifch.qwc); |
469 |
william |
31 |
} |
470 |
|
|
else |
471 |
|
|
{ |
472 |
william |
280 |
GIF_LOG("Direct MFIFO transfer doing %x Total QWC", mfifoqwc); |
473 |
william |
62 |
/* it doesn't, so just transfer 'qwc*16' words from 'gifch.madr' to GS */ |
474 |
william |
280 |
|
475 |
|
|
gifch.madr = dmacRegs.rbor.ADDR + (gifch.madr & dmacRegs.rbsr.RMSK); |
476 |
william |
62 |
src = (u32*)PSM(gifch.madr); |
477 |
william |
31 |
if (src == NULL) return false; |
478 |
william |
62 |
mfifoqwc = GIFPath_CopyTag(GIF_PATH_3, (u128*)src, mfifoqwc); |
479 |
william |
280 |
GIF_LOG("%X QWC Copied direct %x QWC Left", mfifoqwc, gifch.qwc); |
480 |
william |
31 |
} |
481 |
|
|
|
482 |
william |
62 |
GetMTGS().SendDataPacket(); |
483 |
william |
280 |
//gifqwc -= mfifoqwc; |
484 |
|
|
mfifocycles += (mfifoqwc) * 2; /* guessing */ |
485 |
william |
31 |
|
486 |
|
|
return true; |
487 |
|
|
} |
488 |
|
|
|
489 |
|
|
// called from only one location, so forceinline it: |
490 |
william |
62 |
static __fi bool mfifoGIFchain() |
491 |
william |
31 |
{ |
492 |
|
|
/* Is QWC = 0? if so there is nothing to transfer */ |
493 |
william |
62 |
if (gifch.qwc == 0) return true; |
494 |
william |
31 |
|
495 |
william |
62 |
if (gifch.madr >= dmacRegs.rbor.ADDR && |
496 |
william |
280 |
gifch.madr <= (dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16)) |
497 |
william |
31 |
{ |
498 |
william |
280 |
bool ret = true; |
499 |
|
|
// if(gifch.madr == (dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16)) DevCon.Warning("Edge GIF"); |
500 |
|
|
if (!mfifoGIFrbTransfer()) ret = false; |
501 |
|
|
if(QWCinGIFMFIFO(gifch.madr) == 0) gifstate |= GIF_STATE_EMPTY; |
502 |
william |
401 |
|
503 |
|
|
//Make sure we wrap the addresses, dont want it being stuck outside the ring when reading from the ring! |
504 |
|
|
gifch.madr = dmacRegs.rbor.ADDR + (gifch.madr & dmacRegs.rbsr.RMSK); |
505 |
|
|
gifch.tadr = dmacRegs.rbor.ADDR + (gifch.tadr & dmacRegs.rbsr.RMSK); //Check this too, tadr can suffer the same issue. |
506 |
|
|
|
507 |
william |
280 |
return ret; |
508 |
|
|
|
509 |
william |
31 |
} |
510 |
|
|
else |
511 |
|
|
{ |
512 |
|
|
int mfifoqwc; |
513 |
william |
280 |
GIF_LOG("Non-MFIFO Location transfer doing %x Total QWC", gifch.qwc); |
514 |
william |
62 |
tDMA_TAG *pMem = dmaGetAddr(gifch.madr, false); |
515 |
william |
31 |
if (pMem == NULL) return false; |
516 |
|
|
|
517 |
william |
62 |
mfifoqwc = WRITERING_DMA(pMem, gifch.qwc); |
518 |
william |
31 |
mfifocycles += (mfifoqwc) * 2; /* guessing */ |
519 |
|
|
} |
520 |
|
|
|
521 |
|
|
return true; |
522 |
|
|
} |
523 |
|
|
|
524 |
|
|
static u32 qwctag(u32 mask) |
525 |
|
|
{ |
526 |
william |
62 |
return (dmacRegs.rbor.ADDR + (mask & dmacRegs.rbsr.RMSK)); |
527 |
william |
31 |
} |
528 |
|
|
|
529 |
|
|
void mfifoGIFtransfer(int qwc) |
530 |
|
|
{ |
531 |
|
|
tDMA_TAG *ptag; |
532 |
|
|
|
533 |
|
|
mfifocycles = 0; |
534 |
|
|
gifmfifoirq = false; |
535 |
|
|
|
536 |
|
|
if(qwc > 0 ) |
537 |
|
|
{ |
538 |
william |
401 |
if ((gifstate & GIF_STATE_EMPTY)) |
539 |
william |
280 |
{ |
540 |
william |
401 |
if(gifch.chcr.STR == true && !(cpuRegs.interrupt & (1<<DMAC_MFIFO_GIF))) |
541 |
|
|
CPU_INT(DMAC_MFIFO_GIF, 4); |
542 |
|
|
|
543 |
|
|
gifstate &= ~GIF_STATE_EMPTY; |
544 |
william |
280 |
} |
545 |
william |
401 |
|
546 |
william |
280 |
gifRegs.stat.FQC = 16; |
547 |
|
|
return; |
548 |
william |
31 |
} |
549 |
|
|
|
550 |
william |
62 |
if (gifRegs.ctrl.PSE) // temporarily stop |
551 |
|
|
{ |
552 |
|
|
Console.WriteLn("Gif dma temp paused?"); |
553 |
|
|
CPU_INT(DMAC_MFIFO_GIF, 16); |
554 |
|
|
return; |
555 |
|
|
} |
556 |
william |
31 |
|
557 |
william |
62 |
if (gifch.qwc == 0) |
558 |
william |
31 |
{ |
559 |
william |
62 |
gifch.tadr = qwctag(gifch.tadr); |
560 |
william |
31 |
|
561 |
william |
62 |
ptag = dmaGetAddr(gifch.tadr, false); |
562 |
|
|
gifch.unsafeTransfer(ptag); |
563 |
|
|
gifch.madr = ptag[1]._u32; |
564 |
william |
31 |
|
565 |
|
|
mfifocycles += 2; |
566 |
|
|
|
567 |
|
|
GIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", |
568 |
william |
62 |
ptag[1]._u32, ptag[0]._u32, gifch.qwc, ptag->ID, gifch.madr, gifch.tadr, gifqwc, spr0ch.madr); |
569 |
william |
31 |
|
570 |
william |
280 |
gspath3done = hwDmacSrcChainWithStack(gifch, ptag->ID); |
571 |
william |
31 |
|
572 |
william |
280 |
if(gspath3done == true) gifstate = GIF_STATE_DONE; |
573 |
|
|
else gifstate = GIF_STATE_READY; |
574 |
william |
31 |
|
575 |
william |
62 |
if ((gifch.chcr.TIE) && (ptag->IRQ)) |
576 |
william |
31 |
{ |
577 |
|
|
SPR_LOG("dmaIrq Set"); |
578 |
|
|
gifstate = GIF_STATE_DONE; |
579 |
|
|
gifmfifoirq = true; |
580 |
|
|
} |
581 |
william |
280 |
if (QWCinGIFMFIFO(gifch.tadr) == 0) gifstate |= GIF_STATE_EMPTY; |
582 |
|
|
} |
583 |
william |
31 |
|
584 |
william |
401 |
if (vif1Regs.mskpath3 || gifRegs.mode.M3R) |
585 |
|
|
{ |
586 |
|
|
if ((gifch.qwc == 0) && (gifstate & GIF_STATE_DONE)) gifstate |= GIF_STATE_STALL; |
587 |
|
|
|
588 |
|
|
if (GSTransferStatus.PTH3 == STOPPED_MODE) |
589 |
|
|
{ |
590 |
|
|
DevCon.Warning("GIFMFIFO PTH3 MASK Paused by VIF QWC %x"); |
591 |
|
|
|
592 |
|
|
MSKPATH3_LOG("Path3 Paused by VIF Idling"); |
593 |
|
|
gifRegs.stat.set_flags(GIF_STAT_P3Q); |
594 |
|
|
return; |
595 |
|
|
} |
596 |
|
|
} |
597 |
william |
31 |
if (!mfifoGIFchain()) |
598 |
|
|
{ |
599 |
william |
62 |
Console.WriteLn("GIF dmaChain error size=%d, madr=%lx, tadr=%lx", gifch.qwc, gifch.madr, gifch.tadr); |
600 |
william |
31 |
gifstate = GIF_STATE_STALL; |
601 |
|
|
} |
602 |
|
|
|
603 |
william |
280 |
if ((gifch.qwc == 0) && (gifstate & GIF_STATE_DONE)) gifstate |= GIF_STATE_STALL; |
604 |
william |
62 |
CPU_INT(DMAC_MFIFO_GIF,mfifocycles); |
605 |
william |
31 |
|
606 |
william |
62 |
SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x", gifch.chcr._u32, gifch.madr, gifch.tadr); |
607 |
william |
31 |
} |
608 |
|
|
|
609 |
|
|
void gifMFIFOInterrupt() |
610 |
|
|
{ |
611 |
william |
280 |
GIF_LOG("gifMFIFOInterrupt"); |
612 |
william |
31 |
mfifocycles = 0; |
613 |
|
|
|
614 |
william |
280 |
if (dmacRegs.ctrl.MFD != MFD_GIF) |
615 |
|
|
{ |
616 |
|
|
DevCon.Warning("Not in GIF MFIFO mode! Stopping GIF MFIFO"); |
617 |
|
|
return; |
618 |
|
|
} |
619 |
|
|
|
620 |
william |
62 |
if(SIGNAL_IMR_Pending == true) |
621 |
william |
31 |
{ |
622 |
william |
62 |
//DevCon.Warning("Path 3 Paused"); |
623 |
|
|
CPU_INT(DMAC_MFIFO_GIF, 128); |
624 |
|
|
return; |
625 |
william |
31 |
} |
626 |
|
|
|
627 |
william |
401 |
if(GSTransferStatus.PTH3 == PENDINGSTOP_MODE) |
628 |
|
|
{ |
629 |
william |
280 |
GSTransferStatus.PTH3 = STOPPED_MODE; |
630 |
william |
401 |
|
631 |
|
|
if(gifRegs.stat.APATH == GIF_APATH3) |
632 |
|
|
{ |
633 |
|
|
gifRegs.stat.APATH = GIF_APATH_IDLE; |
634 |
|
|
gifRegs.stat.OPH = false; |
635 |
|
|
if(gifRegs.stat.P1Q) gsPath1Interrupt(); |
636 |
|
|
} |
637 |
william |
31 |
} |
638 |
|
|
|
639 |
william |
280 |
if((gifstate & GIF_STATE_EMPTY)) |
640 |
|
|
{ |
641 |
|
|
FireMFIFOEmpty(); |
642 |
|
|
if(!(gifstate & GIF_STATE_STALL)) return; |
643 |
|
|
} |
644 |
|
|
|
645 |
william |
62 |
if(CheckPaths(11) == false) return; |
646 |
|
|
|
647 |
|
|
if (!(gifch.chcr.STR)) |
648 |
william |
31 |
{ |
649 |
|
|
Console.WriteLn("WTF GIFMFIFO"); |
650 |
|
|
cpuRegs.interrupt &= ~(1 << 11); |
651 |
|
|
return; |
652 |
|
|
} |
653 |
|
|
|
654 |
|
|
if (!(gifstate & GIF_STATE_STALL)) |
655 |
|
|
{ |
656 |
william |
280 |
if (QWCinGIFMFIFO(gifch.tadr) == 0) |
657 |
william |
31 |
{ |
658 |
|
|
gifstate |= GIF_STATE_EMPTY; |
659 |
william |
280 |
CPU_INT(DMAC_MFIFO_GIF, 4); |
660 |
william |
31 |
return; |
661 |
|
|
} |
662 |
william |
280 |
|
663 |
william |
31 |
mfifoGIFtransfer(0); |
664 |
|
|
return; |
665 |
|
|
} |
666 |
|
|
|
667 |
|
|
#ifdef PCSX2_DEVBUILD |
668 |
william |
62 |
if ((gifstate & GIF_STATE_READY) || (gifch.qwc > 0)) |
669 |
william |
31 |
{ |
670 |
|
|
Console.Error("gifMFIFO Panic > Shouldn't go here!"); |
671 |
|
|
return; |
672 |
|
|
} |
673 |
|
|
#endif |
674 |
|
|
//if(gifqwc > 0) Console.WriteLn("GIF MFIFO ending with stuff in it %x", gifqwc); |
675 |
|
|
if (!gifmfifoirq) gifqwc = 0; |
676 |
|
|
|
677 |
|
|
gspath3done = false; |
678 |
|
|
gscycles = 0; |
679 |
|
|
|
680 |
william |
62 |
gifRegs.stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_P3Q | GIF_STAT_FQC); // APATH, P3Q, FQC = 0 |
681 |
william |
31 |
|
682 |
william |
62 |
vif1Regs.stat.VGW = false; |
683 |
|
|
gifch.chcr.STR = false; |
684 |
william |
31 |
gifstate = GIF_STATE_READY; |
685 |
|
|
hwDmacIrq(DMAC_GIF); |
686 |
william |
401 |
DMA_LOG("GIF MFIFO DMA End"); |
687 |
william |
31 |
clearFIFOstuff(false); |
688 |
|
|
} |
689 |
|
|
|
690 |
|
|
void SaveStateBase::gifFreeze() |
691 |
|
|
{ |
692 |
|
|
FreezeTag( "GIFdma" ); |
693 |
|
|
|
694 |
|
|
Freeze( gifstate ); |
695 |
|
|
Freeze( gifqwc ); |
696 |
|
|
Freeze( gspath3done ); |
697 |
|
|
Freeze( gscycles ); |
698 |
|
|
// Note: mfifocycles is not a persistent var, so no need to save it here. |
699 |
william |
62 |
|
700 |
|
|
int bufsize = Path1WritePos - Path1ReadPos; |
701 |
|
|
Freeze(bufsize); |
702 |
|
|
|
703 |
|
|
if (IsSaving()) |
704 |
|
|
{ |
705 |
|
|
// We can just load the queued Path1 data into the front of the buffer, and |
706 |
|
|
// reset the ReadPos and WritePos accordingly. |
707 |
|
|
FreezeMem(Path1Buffer, bufsize); |
708 |
|
|
Path1ReadPos = 0; |
709 |
|
|
Path1WritePos = bufsize; |
710 |
|
|
} |
711 |
|
|
else |
712 |
|
|
{ |
713 |
|
|
// Only want to save the actual Path1 data between readpos and writepos. The |
714 |
|
|
// rest of the buffer is just unused-ness! |
715 |
|
|
FreezeMem(&Path1Buffer[Path1ReadPos], bufsize); |
716 |
|
|
} |
717 |
william |
31 |
} |