/[pcsx2_0.9.7]/trunk/pcsx2/FiFo.cpp
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Contents of /trunk/pcsx2/FiFo.cpp

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Revision 118 - (show annotations) (download)
Fri Sep 10 00:26:38 2010 UTC (9 years, 4 months ago) by william
File size: 4280 byte(s)
Auto Commited Import of: pcsx2-0.9.7-DEBUG (upstream: v0.9.7.3744 local: v0.9.7.87) in ./trunk
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16
17 #include "PrecompiledHeader.h"
18 #include "Common.h"
19
20 #include "Gif.h"
21 #include "GS.h"
22 #include "Vif.h"
23 #include "Vif_Dma.h"
24 #include "IPU/IPU.h"
25 #include "IPU/IPU_Fifo.h"
26
27 //////////////////////////////////////////////////////////////////////////
28 /////////////////////////// Quick & dirty FIFO :D ////////////////////////
29 //////////////////////////////////////////////////////////////////////////
30
31 // Notes on FIFO implementation
32 //
33 // The FIFO consists of four separate pages of HW register memory, each mapped to a
34 // PS2 device. They are listed as follows:
35 //
36 // 0x4000 - 0x5000 : VIF0 (all registers map to 0x4000)
37 // 0x5000 - 0x6000 : VIF1 (all registers map to 0x5000)
38 // 0x6000 - 0x7000 : GS (all registers map to 0x6000)
39 // 0x7000 - 0x8000 : IPU (registers map to 0x7000 and 0x7010, respectively)
40
41 void __fastcall ReadFIFO_VIF1(mem128_t* out)
42 {
43 if (vif1Regs.stat.test(VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS) )
44 DevCon.Warning( "Reading from vif1 fifo when stalled" );
45
46 pxAssertRel(vif1Regs.stat.FQC != 0, "FQC = 0 on VIF FIFO READ!");
47 if (vif1Regs.stat.FDR)
48 {
49 if(vif1Regs.stat.FQC > vif1.GSLastDownloadSize)
50 {
51 DevCon.Warning("Warning! GS Download size < FIFO count!");
52 }
53 if (vif1Regs.stat.FQC > 0)
54 {
55 GetMTGS().WaitGS();
56 GSreadFIFO((u64*)out);
57 vif1.GSLastDownloadSize--;
58 if (vif1.GSLastDownloadSize <= 16)
59 gifRegs.stat.OPH = false;
60 vif1Regs.stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
61 }
62 }
63
64 VIF_LOG("ReadFIFO/VIF1 -> %ls", out->ToString().c_str());
65 }
66
67 //////////////////////////////////////////////////////////////////////////
68 // WriteFIFO Pages
69 //
70 void __fastcall WriteFIFO_VIF0(const mem128_t *value)
71 {
72 VIF_LOG("WriteFIFO/VIF0 <- %ls", value->ToString().c_str());
73
74 vif0ch.qwc += 1;
75 if(vif0.irqoffset != 0 && vif0.vifstalled == true) DevCon.Warning("Offset on VIF0 FIFO start!");
76 bool ret = VIF0transfer((u32*)value, 4);
77
78 if (vif0.cmd)
79 {
80 if(vif0.done && vif0ch.qwc == 0) vif0Regs.stat.VPS = VPS_WAITING;
81 }
82 else
83 {
84 vif0Regs.stat.VPS = VPS_IDLE;
85 }
86
87 pxAssertDev( ret, "vif stall code not implemented" );
88 }
89
90 void __fastcall WriteFIFO_VIF1(const mem128_t *value)
91 {
92 VIF_LOG("WriteFIFO/VIF1 <- %ls", value->ToString().c_str());
93
94 if (vif1Regs.stat.FDR)
95 DevCon.Warning("writing to fifo when fdr is set!");
96 if (vif1Regs.stat.test(VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS) )
97 DevCon.Warning("writing to vif1 fifo when stalled");
98
99 vif1ch.qwc += 1;
100 if(vif1.irqoffset != 0 && vif1.vifstalled == true) DevCon.Warning("Offset on VIF1 FIFO start!");
101 bool ret = VIF1transfer((u32*)value, 4);
102
103 if(GSTransferStatus.PTH2 == STOPPED_MODE && gifRegs.stat.APATH == GIF_APATH2)
104 {
105 if(gifRegs.stat.DIR == 0)gifRegs.stat.OPH = false;
106 gifRegs.stat.APATH = GIF_APATH_IDLE;
107 if(gifRegs.stat.P1Q) gsPath1Interrupt();
108 }
109 if (vif1.cmd)
110 {
111 if(vif1.done == true && vif1ch.qwc == 0) vif1Regs.stat.VPS = VPS_WAITING;
112 }
113 else
114 {
115 vif1Regs.stat.VPS = VPS_IDLE;
116 }
117
118 pxAssertDev( ret, "vif stall code not implemented" );
119 }
120
121 void __fastcall WriteFIFO_GIF(const mem128_t *value)
122 {
123 GIF_LOG("WriteFIFO/GIF <- %ls", value->ToString().c_str());
124
125 //CopyQWC(&psHu128(GIF_FIFO), value);
126 //CopyQWC(&nloop0_packet, value);
127
128 GetMTGS().PrepDataPacket(GIF_PATH_3, 1);
129 GIFPath_CopyTag( GIF_PATH_3, value, 1 );
130 GetMTGS().SendDataPacket();
131 if(GSTransferStatus.PTH3 == STOPPED_MODE && gifRegs.stat.APATH == GIF_APATH3 )
132 {
133 if(gifRegs.stat.DIR == 0)gifRegs.stat.OPH = false;
134 gifRegs.stat.APATH = GIF_APATH_IDLE;
135 if(gifRegs.stat.P1Q) gsPath1Interrupt();
136 }
137 }

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