/[pcsx2_0.9.7]/trunk/pcsx2/DebugTools/DisR5900.cpp
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Contents of /trunk/pcsx2/DebugTools/DisR5900.cpp

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Revision 62 - (show annotations) (download)
Tue Sep 7 11:08:22 2010 UTC (9 years, 9 months ago) by william
File size: 48283 byte(s)
Auto Commited Import of: pcsx2-0.9.7-r3738-debug in ./trunk
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16
17 #include "PrecompiledHeader.h"
18
19 #include "Debug.h"
20 #include "R5900.h"
21 #include "VU.h"
22
23 using std::string;
24
25 const char * const disRNameCP2f[] = {
26 "VF00", "VF01", "VF02", "VF03", "VF04", "VF05", "VF06", "VF07",
27 "VF08", "VF09", "VF10", "VF11", "VF12", "VF13", "VF14", "VF15",
28 "VF16", "VF17", "VF18", "VF19", "VF20", "VF21", "VF22", "VF23",
29 "VF24", "VF25", "VF26", "VF27", "VF28", "VF29", "VF30", "VF31"};
30
31 const char * const disRNameCP2i[] = {
32 "VI00", "VI01", "VI02", "VI03", "VI04", "VI05", "VI06", "VI07",
33 "VI08", "VI09", "VI10", "VI11", "VI12", "VI13", "VI14", "VI15",
34 "Status", "MAC", "Clip", "*RES*", "R", "I", "Q", "*RES*",
35 "*RES*", "*RES*", "TPC", "CMSAR0", "FBRST", "VPU-STAT", "*RES*", "CMSAR1"};
36
37 const char * const CP2VFnames[] = { "x", "y", "z", "w" };
38
39 namespace R5900
40 {
41
42 // Names of registers
43 const char * const disRNameGPR[] = {
44 "r0", "at", "v0", "v1", "a0", "a1","a2", "a3",
45 "t0", "t1", "t2", "t3", "t4", "t5","t6", "t7",
46 "s0", "s1", "s2", "s3", "s4", "s5","s6", "s7",
47 "t8", "t9", "k0", "k1", "gp", "sp","fp", "ra", "hi", "lo"}; // lo,hi used in rec
48
49 const char * const disRNameCP0[] = {
50 "Index" , "Random" , "EntryLo0" , "EntryLo1", "Context" , "PageMask" , "Wired" , "*RES*",
51 "BadVAddr" , "Count" , "EntryHi" , "Compare" , "Status" , "Cause" , "ExceptPC" , "PRevID",
52 "Config" , "LLAddr" , "WatchLo" , "WatchHi" , "*RES*" , "*RES*" , "*RES*" , "Debug",
53 "DEPC" , "PerfCnt" , "ErrCtl" , "CacheErr", "TagLo" , "TagHi" , "ErrorEPC" , "DESAVE"};
54
55 const char * const disRNameCP1[] = {
56 "FPR0" , "FPR1" , "FPR2" , "FPR3" , "FPR4" , "FPR5" , "FPR6" , "FPR7",
57 "FPR8" , "FPR9" , "FPR10", "FPR11", "FPR12", "FPR13", "FPR14", "FPR15",
58 "FPR16", "FPR17", "FPR18", "FPR19", "FPR20", "FPR21", "FPR22", "FPR23",
59 "FPR24", "FPR25", "FPR26", "FPR27", "FPR28", "FPR29", "FPR30", "FPR31"};
60
61 const char * const disRNameCP1c[] = {
62 "FRevID", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*",
63 "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*",
64 "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*",
65 "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "*RES*", "FStatus"};
66
67 // Type definition of our functions
68 #define DisFInterface (string& output, u32 code)
69 #define DisFInterfaceT (string&, u32)
70 #define DisFInterfaceN (output, code)
71
72 typedef void (*TdisR5900F)DisFInterface;
73
74 // These macros are used to assemble the disassembler functions
75 #define MakeDisF(fn, b) \
76 void fn DisFInterface { \
77 ssprintf(output, "(%8.8x) ", code); \
78 b; \
79 }
80
81 #undef _Target_
82 #undef _Branch_
83 #undef _Funct_
84 #undef _Rd_
85 #undef _Rt_
86 #undef _Rs_
87 #undef _Sa_
88 #undef _Im_
89
90 #define _Funct_ ((code ) & 0x3F) // The funct part of the instruction register
91 #define _Rd_ ((code >> 11) & 0x1F) // The rd part of the instruction register
92 #define _Rt_ ((code >> 16) & 0x1F) // The rt part of the instruction register
93 #define _Rs_ ((code >> 21) & 0x1F) // The rs part of the instruction register
94 #define _Sa_ ((code >> 6) & 0x1F) // The sa part of the instruction register
95 #define _Im_ ( code & 0xFFFF) // The immediate part of the instruction register
96
97
98 #define _rRs_ cpuRegs.GPR.r[_Rs_].UL[1], cpuRegs.GPR.r[_Rs_].UL[0] // Rs register
99 #define _rRt_ cpuRegs.GPR.r[_Rt_].UL[1], cpuRegs.GPR.r[_Rt_].UL[0] // Rt register
100 #define _rRd_ cpuRegs.GPR.r[_Rd_].UL[1], cpuRegs.GPR.r[_Rd_].UL[0] // Rd register
101 #define _rSa_ cpuRegs.GPR.r[_Sa_].UL[1], cpuRegs.GPR.r[_Sa_].UL[0] // Sa register
102
103 #define _rFs_ cpuRegs.CP0.r[_Rd_] // Fs register
104
105 #define _rRs32_ cpuRegs.GPR.r[_Rs_].UL[0] // Rs register
106 #define _rRt32_ cpuRegs.GPR.r[_Rt_].UL[0] // Rt register
107 #define _rRd32_ cpuRegs.GPR.r[_Rd_].UL[0] // Rd register
108 #define _rSa32_ cpuRegs.GPR.r[_Sa_].UL[0] // Sa register
109
110
111 #define _nRs_ _rRs_, disRNameGPR[_Rs_]
112 #define _nRt_ _rRt_, disRNameGPR[_Rt_]
113 #define _nRd_ _rRd_, disRNameGPR[_Rd_]
114 #define _nSa_ _rSa_, disRNameGPR[_Sa_]
115 #define _nRd0_ _rFs_, disRNameCP0[_Rd_]
116
117 #define _nRs32_ _rRs32_, disRNameGPR[_Rs_]
118 #define _nRt32_ _rRt32_, disRNameGPR[_Rt_]
119 #define _nRd32_ _rRd32_, disRNameGPR[_Rd_]
120 #define _nSa32_ _rSa32_, disRNameGPR[_Sa_]
121
122 #define _I_ _Im_, _Im_
123 #define _Target_ ((cpuRegs.pc & 0xf0000000) + ((code & 0x03ffffff) * 4))
124 #define _Branch_ (cpuRegs.pc + 4 + ((short)_Im_ * 4))
125 #define _OfB_ _Im_, _nRs_
126
127 #define _Fsf_ ((code >> 21) & 0x03)
128 #define _Ftf_ ((code >> 23) & 0x03)
129
130 // sap! it stands for string append. It's not a friendly name but for now it makes
131 // the copy-paste marathon of code below more readable!
132 #define _sap( str ) ssappendf( output, str,
133
134 #define dName(i) _sap("%-7s\t") i);
135 #define dGPR128(i) _sap("%8.8x_%8.8x_%8.8x_%8.8x (%s),") cpuRegs.GPR.r[i].UL[3], cpuRegs.GPR.r[i].UL[2], cpuRegs.GPR.r[i].UL[1], cpuRegs.GPR.r[i].UL[0], disRNameGPR[i])
136 #define dGPR64(i) _sap("%8.8x_%8.8x (%s),") cpuRegs.GPR.r[i].UL[1], cpuRegs.GPR.r[i].UL[0], disRNameGPR[i])
137 #define dGPR64U(i) _sap("%8.8x_%8.8x (%s),") cpuRegs.GPR.r[i].UL[3], cpuRegs.GPR.r[i].UL[2], disRNameGPR[i])
138 #define dGPR32(i) _sap("%8.8x (%s),") cpuRegs.GPR.r[i].UL[0], disRNameGPR[i])
139
140 #define dCP032(i) _sap("%8.8x (%s),") cpuRegs.CP0.r[i], disRNameCP0[i])
141
142 #define dCP132(i) _sap("%f (%s),") fpuRegs.fpr[i].f, disRNameCP1[i])
143 #define dCP1c32(i) _sap("%8.8x (%s),") fpuRegs.fprc[i], disRNameCP1c[i])
144 #define dCP1acc() _sap("%f (ACC),") fpuRegs.ACC.f)
145
146 #define dCP2128f(i) _sap("w=%f z=%f y=%f x=%f (%s),") VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, disRNameCP2f[i])
147 #define dCP232x(i) _sap("x=%f (%s),") VU0.VF[i].f.x, disRNameCP2f[i])
148 #define dCP232y(i) _sap("y=%f (%s),") VU0.VF[i].f.y, disRNameCP2f[i])
149 #define dCP232z(i) _sap("z=%f (%s),") VU0.VF[i].f.z, disRNameCP2f[i])
150 #define dCP232w(i) _sap("w=%f (%s),") VU0.VF[i].f.w, disRNameCP2f[i])
151 #define dCP2ACCf() _sap("w=%f z=%f y=%f x=%f (ACC),") VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
152 #define dCP232i(i) _sap("%8.8x (%s),") VU0.VI[i].UL, disRNameCP2i[i])
153 #define dCP232iF(i) _sap("%f (%s),") VU0.VI[i].F, disRNameCP2i[i])
154 #define dCP232f(i, j) _sap("Q %s=%f (%s),") CP2VFnames[j], VU0.VF[i].F[j], disRNameCP2f[i])
155
156 #define dHI64() _sap("%8.8x_%8.8x (%s),") cpuRegs.HI.UL[1], cpuRegs.HI.UL[0], "hi")
157 #define dLO64() _sap("%8.8x_%8.8x (%s),") cpuRegs.LO.UL[1], cpuRegs.LO.UL[0], "lo")
158 #define dImm() _sap("%4.4x (%d),") _Im_, _Im_)
159 #define dTarget() _sap("%8.8x,") _Target_)
160 #define dSa() _sap("%2.2x (%d),") _Sa_, _Sa_)
161 #define dSa32() _sap("%2.2x (%d),") _Sa_+32, _Sa_+32)
162 #define dOfB() _sap("%4.4x (%8.8x (%s)),") _Im_, cpuRegs.GPR.r[_Rs_].UL[0], disRNameGPR[_Rs_])
163 #define dOffset() _sap("%8.8x,") _Branch_)
164 #define dCode() _sap("%8.8x,") (code >> 6) & 0xffffff)
165 #define dSaR() _sap("%8.8x,") cpuRegs.sa)
166
167 struct sSymbol {
168 u32 addr;
169 char name[256];
170 };
171
172 static sSymbol *dSyms = NULL;
173 static int nSymAlloc = 0;
174 static int nSyms = 0;
175
176 void disR5900AddSym(u32 addr, const char *name) {
177
178 if( !pxAssertDev(strlen(name) < sizeof(dSyms->name),
179 wxsFormat(L"String length out of bounds on debug symbol. Allowed=%d, Symbol=%d", sizeof(dSyms->name)-1, strlen(name)))
180 ) return;
181
182 if( nSyms+1 >= nSymAlloc )
183 {
184 // Realloc by threshold block sizes.
185 nSymAlloc += 64 + (nSyms / 4);
186 dSyms = (sSymbol*)realloc(dSyms, sizeof(sSymbol) * (nSymAlloc));
187 }
188
189 if (dSyms == NULL) return;
190 dSyms[nSyms].addr = addr;
191 strncpy(dSyms[nSyms].name, name, 256);
192 nSyms++;
193 }
194
195 void disR5900FreeSyms() {
196 if (dSyms != NULL) { free(dSyms); dSyms = NULL; }
197 nSymAlloc = 0;
198 nSyms = 0;
199 }
200
201 const char *disR5900GetSym(u32 addr) {
202 int i;
203
204 if (dSyms == NULL) return NULL;
205 for (i=0; i<nSyms; i++)
206 if (dSyms[i].addr == addr) return dSyms[i].name;
207
208 return NULL;
209 }
210
211 const char *disR5900GetUpperSym(u32 addr) {
212 u32 laddr;
213 int i, j=-1;
214
215 if (dSyms == NULL) return NULL;
216 for (i=0, laddr=0; i<nSyms; i++) {
217 if (dSyms[i].addr < addr && dSyms[i].addr > laddr) {
218 laddr = dSyms[i].addr;
219 j = i;
220 }
221 }
222 if (j == -1) return NULL;
223 return dSyms[j].name;
224 }
225
226 void dFindSym( string& output, u32 addr )
227 {
228 const char* label = disR5900GetSym( addr );
229 if( label != NULL )
230 output.append( label );
231 }
232
233 #define dAppendSym(addr) dFindSym( output, addr )
234
235 /*********************************************************
236 * Arithmetic with immediate operand *
237 * Format: OP rt, rs, immediate *
238 *********************************************************/
239 MakeDisF(disADDI, dName("ADDI"); dGPR64(_Rt_); dGPR32(_Rs_); dImm();)
240 MakeDisF(disADDIU, dName("ADDIU"); dGPR64(_Rt_); dGPR32(_Rs_); dImm();)
241 MakeDisF(disANDI, dName("ANDI"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
242 MakeDisF(disORI, dName("ORI"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
243 MakeDisF(disSLTI, dName("SLTI"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
244 MakeDisF(disSLTIU, dName("SLTIU"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
245 MakeDisF(disXORI, dName("XORI"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
246 MakeDisF(disDADDI, dName("DADDI"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
247 MakeDisF(disDADDIU, dName("DADDIU"); dGPR64(_Rt_); dGPR64(_Rs_); dImm();)
248
249 /*********************************************************
250 * Register arithmetic *
251 * Format: OP rd, rs, rt *
252 *********************************************************/
253 MakeDisF(disADD, dName("ADD"); dGPR64(_Rd_); dGPR32(_Rs_); dGPR32(_Rt_);)
254 MakeDisF(disADDU, dName("ADDU"); dGPR64(_Rd_); dGPR32(_Rs_); dGPR32(_Rt_);)
255 MakeDisF(disDADD, dName("DADD"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
256 MakeDisF(disDADDU, dName("DADDU"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
257 MakeDisF(disSUB, dName("SUB"); dGPR64(_Rd_); dGPR32(_Rs_); dGPR32(_Rt_);)
258 MakeDisF(disSUBU, dName("SUBU"); dGPR64(_Rd_); dGPR32(_Rs_); dGPR32(_Rt_);)
259 MakeDisF(disDSUB, dName("DSUB"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
260 MakeDisF(disDSUBU, dName("DSDBU"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
261 MakeDisF(disAND, dName("AND"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
262 MakeDisF(disOR, dName("OR"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
263 MakeDisF(disXOR, dName("XOR"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
264 MakeDisF(disNOR, dName("NOR"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
265 MakeDisF(disSLT, dName("SLT"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
266 MakeDisF(disSLTU, dName("SLTU"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
267
268 /*********************************************************
269 * Jump to target *
270 * Format: OP target *
271 *********************************************************/
272 MakeDisF(disJ, dName("J"); dTarget(); dAppendSym(_Target_);)
273 MakeDisF(disJAL, dName("JAL"); dTarget(); dGPR32(31); dAppendSym(_Target_);)
274
275 /*********************************************************
276 * Register jump *
277 * Format: OP rs, rd *
278 *********************************************************/
279 MakeDisF(disJR, dName("JR"); dGPR32(_Rs_); dAppendSym(cpuRegs.GPR.r[_Rs_].UL[0]);)
280 MakeDisF(disJALR, dName("JALR"); dGPR32(_Rs_); dGPR32(_Rd_); dAppendSym(cpuRegs.GPR.r[_Rs_].UL[0]);)
281
282 /*********************************************************
283 * Register mult/div & Register trap logic *
284 * Format: OP rs, rt *
285 *********************************************************/
286 MakeDisF(disDIV, dName("DIV"); dGPR32(_Rs_); dGPR32(_Rt_);)
287 MakeDisF(disDIVU, dName("DIVU"); dGPR32(_Rs_); dGPR32(_Rt_);)
288 MakeDisF(disMULT, dName("MULT"); dGPR32(_Rs_); dGPR32(_Rt_); dGPR32(_Rd_);)
289 MakeDisF(disMULTU, dName("MULTU"); dGPR32(_Rs_); dGPR32(_Rt_); dGPR32(_Rd_);)
290
291 /*********************************************************
292 * Load higher 16 bits of the first word in GPR with imm *
293 * Format: OP rt, immediate *
294 *********************************************************/
295 MakeDisF(disLUI, dName("LUI"); dGPR64(_Rt_); dImm();)
296
297 /*********************************************************
298 * Move from HI/LO to GPR *
299 * Format: OP rd *
300 *********************************************************/
301 MakeDisF(disMFHI, dName("MFHI"); dGPR64(_Rd_); dHI64();)
302 MakeDisF(disMFLO, dName("MFLO"); dGPR64(_Rd_); dLO64();)
303
304 /*********************************************************
305 * Move to GPR to HI/LO & Register jump *
306 * Format: OP rs *
307 *********************************************************/
308 MakeDisF(disMTHI, dName("MTHI"); dHI64(); dGPR64(_Rs_);)
309 MakeDisF(disMTLO, dName("MTLO"); dLO64(); dGPR64(_Rs_);)
310
311 /*********************************************************
312 * Shift arithmetic with constant shift *
313 * Format: OP rd, rt, sa *
314 *********************************************************/
315 MakeDisF(disSLL, if (code) { dName("SLL"); dGPR64(_Rd_); dGPR32(_Rt_); dSa(); } else { dName("NOP"); })
316 MakeDisF(disDSLL, dName("DSLL"); dGPR64(_Rd_); dGPR64(_Rt_); dSa();)
317 MakeDisF(disDSLL32, dName("DSLL32"); dGPR64(_Rd_); dGPR64(_Rt_); dSa32();)
318 MakeDisF(disSRA, dName("SRA"); dGPR64(_Rd_); dGPR32(_Rt_); dSa();)
319 MakeDisF(disDSRA, dName("DSRA"); dGPR64(_Rd_); dGPR64(_Rt_); dSa();)
320 MakeDisF(disDSRA32, dName("DSRA32"); dGPR64(_Rd_); dGPR64(_Rt_); dSa32();)
321 MakeDisF(disSRL, dName("SRL"); dGPR64(_Rd_); dGPR32(_Rt_); dSa();)
322 MakeDisF(disDSRL, dName("DSRL"); dGPR64(_Rd_); dGPR64(_Rt_); dSa();)
323 MakeDisF(disDSRL32, dName("DSRL32"); dGPR64(_Rd_); dGPR64(_Rt_); dSa32();)
324
325 /*********************************************************
326 * Shift arithmetic with variant register shift *
327 * Format: OP rd, rt, rs *
328 *********************************************************/
329 MakeDisF(disSLLV, dName("SLLV"); dGPR64(_Rd_); dGPR32(_Rt_); dGPR32(_Rs_);)
330 MakeDisF(disDSLLV, dName("DSLLV"); dGPR64(_Rd_); dGPR64(_Rt_); dGPR32(_Rs_);)
331 MakeDisF(disSRAV, dName("SRAV"); dGPR64(_Rd_); dGPR32(_Rt_); dGPR32(_Rs_);)
332 MakeDisF(disDSRAV, dName("DSRAV"); dGPR64(_Rd_); dGPR64(_Rt_); dGPR32(_Rs_);)
333 MakeDisF(disSRLV, dName("SRLV"); dGPR64(_Rd_); dGPR32(_Rt_); dGPR32(_Rs_);)
334 MakeDisF(disDSRLV, dName("DSRLV"); dGPR64(_Rd_); dGPR64(_Rt_); dGPR32(_Rs_);)
335
336 /*********************************************************
337 * Load and store for GPR *
338 * Format: OP rt, offset(base) *
339 *********************************************************/
340 MakeDisF(disLB, dName("LB"); dGPR64(_Rt_); dOfB();)
341 MakeDisF(disLBU, dName("LBU"); dGPR64(_Rt_); dOfB();)
342 MakeDisF(disLH, dName("LH"); dGPR64(_Rt_); dOfB();)
343 MakeDisF(disLHU, dName("LHU"); dGPR64(_Rt_); dOfB();)
344 MakeDisF(disLW, dName("LW"); dGPR64(_Rt_); dOfB();)
345 MakeDisF(disLWU, dName("LWU"); dGPR64(_Rt_); dOfB();)
346 MakeDisF(disLWL, dName("LWL"); dGPR64(_Rt_); dOfB();)
347 MakeDisF(disLWR, dName("LWR"); dGPR64(_Rt_); dOfB();)
348 MakeDisF(disLD, dName("LD"); dGPR64(_Rt_); dOfB();)
349 MakeDisF(disLDL, dName("LDL"); dGPR64(_Rt_); dOfB();)
350 MakeDisF(disLDR, dName("LDR"); dGPR64(_Rt_); dOfB();)
351 MakeDisF(disLQ, dName("LQ"); dGPR128(_Rt_); dOfB();)
352 MakeDisF(disSB, dName("SB"); dGPR64(_Rt_); dOfB();)
353 MakeDisF(disSH, dName("SH"); dGPR64(_Rt_); dOfB();)
354 MakeDisF(disSW, dName("SW"); dGPR64(_Rt_); dOfB();)
355 MakeDisF(disSWL, dName("SWL"); dGPR64(_Rt_); dOfB();)
356 MakeDisF(disSWR, dName("SWR"); dGPR64(_Rt_); dOfB();)
357 MakeDisF(disSD, dName("SD"); dGPR64(_Rt_); dOfB();)
358 MakeDisF(disSDL, dName("SDL"); dGPR64(_Rt_); dOfB();)
359 MakeDisF(disSDR, dName("SDR"); dGPR64(_Rt_); dOfB();)
360 MakeDisF(disSQ, dName("SQ"); dGPR128(_Rt_); dOfB();)
361
362 /*********************************************************
363 * Register branch logic *
364 * Format: OP rs, rt, offset *
365 *********************************************************/
366 MakeDisF(disBEQ, dName("BEQ"); dGPR64(_Rs_); dGPR64(_Rt_); dOffset();)
367 MakeDisF(disBNE, dName("BNE"); dGPR64(_Rs_); dGPR64(_Rt_); dOffset();)
368
369 /*********************************************************
370 * Moves between GPR and COPx *
371 * Format: OP rt, rd *
372 *********************************************************/
373 MakeDisF(disMFC0, dName("MFC0"); dGPR32(_Rt_); dCP032(_Rd_);)
374 MakeDisF(disMTC0, dName("MTC0"); dCP032(_Rd_); dGPR32(_Rt_);)
375
376 /*********************************************************
377 * Register branch logic *
378 * Format: OP rs, offset *
379 *********************************************************/
380
381 MakeDisF(disBGEZ, dName("BGEZ"); dGPR64(_Rs_); dOffset();)
382 MakeDisF(disBGEZAL, dName("BGEZAL"); dGPR64(_Rs_); dOffset();)
383 MakeDisF(disBGTZ, dName("BGTZ"); dGPR64(_Rs_); dOffset();)
384 MakeDisF(disBLEZ, dName("BLEZ"); dGPR64(_Rs_); dOffset();)
385 MakeDisF(disBLTZ, dName("BLTZ"); dGPR64(_Rs_); dOffset();)
386 MakeDisF(disBLTZAL, dName("BLTZAL"); dGPR64(_Rs_); dOffset();)
387
388
389 /*********************************************************
390 * Register branch logic Likely *
391 * Format: OP rs, offset *
392 *********************************************************/
393
394
395 MakeDisF(disBEQL, dName("BEQL"); dGPR64(_Rs_); dGPR64(_Rt_); dOffset();)
396 MakeDisF(disBNEL, dName("BNEL"); dGPR64(_Rs_); dGPR64(_Rt_); dOffset();)
397 MakeDisF(disBLEZL, dName("BLEZL"); dGPR64(_Rs_); dOffset();)
398 MakeDisF(disBGTZL, dName("BGTZL"); dGPR64(_Rs_); dOffset();)
399 MakeDisF(disBLTZL, dName("BLTZL"); dGPR64(_Rs_); dOffset();)
400 MakeDisF(disBGEZL, dName("BGEZL"); dGPR64(_Rs_); dOffset();)
401 MakeDisF(disBLTZALL, dName("BLTZALL"); dGPR64(_Rs_); dOffset();)
402 MakeDisF(disBGEZALL, dName("BGEZALL"); dGPR64(_Rs_); dOffset();)
403
404
405 /*********************************************************
406 * COP0 opcodes *
407 * *
408 *********************************************************/
409
410 MakeDisF(disBC0F, dName("BC0F"); dOffset();)
411 MakeDisF(disBC0T, dName("BC0T"); dOffset();)
412 MakeDisF(disBC0FL, dName("BC0FL"); dOffset();)
413 MakeDisF(disBC0TL, dName("BC0TL"); dOffset();)
414
415 MakeDisF(disTLBR, dName("TLBR");)
416 MakeDisF(disTLBWI, dName("TLBWI");)
417 MakeDisF(disTLBWR, dName("TLBWR");)
418 MakeDisF(disTLBP, dName("TLBP");)
419 MakeDisF(disERET, dName("ERET");)
420 MakeDisF(disEI, dName("EI");)
421 MakeDisF(disDI, dName("DI");)
422
423 /*********************************************************
424 * COP1 opcodes *
425 * *
426 *********************************************************/
427
428 #define _Ft_ _Rt_
429 #define _Fs_ _Rd_
430 #define _Fd_ _Sa_
431
432 MakeDisF(disMFC1, dName("MFC1"); dGPR64(_Rt_); dCP132(_Fs_);)
433 MakeDisF(disCFC1, dName("CFC1"); dGPR64(_Rt_); dCP1c32(_Fs_);)
434 MakeDisF(disMTC1, dName("MTC1"); dCP132(_Fs_); dGPR64(_Rt_);)
435 MakeDisF(disCTC1, dName("CTC1"); dCP1c32(_Fs_); dGPR64(_Rt_);)
436
437 MakeDisF(disBC1F, dName("BC1F");)
438 MakeDisF(disBC1T, dName("BC1T");)
439 MakeDisF(disBC1FL, dName("BC1FL");)
440 MakeDisF(disBC1TL, dName("BC1TL");)
441
442 MakeDisF(disADDs, dName("ADDs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
443 MakeDisF(disSUBs, dName("SUBs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
444 MakeDisF(disMULs, dName("MULs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
445 MakeDisF(disDIVs, dName("DIVs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
446 MakeDisF(disSQRTs, dName("SQRTs"); dCP132(_Fd_); dCP132(_Ft_);)
447 MakeDisF(disABSs, dName("ABSs"); dCP132(_Fd_); dCP132(_Fs_);)
448 MakeDisF(disMOVs, dName("MOVs"); dCP132(_Fd_); dCP132(_Fs_);)
449 MakeDisF(disNEGs, dName("NEGs"); dCP132(_Fd_); dCP132(_Fs_);)
450 MakeDisF(disRSQRTs, dName("RSQRTs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
451 MakeDisF(disADDAs, dName("ADDAs"); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
452 MakeDisF(disSUBAs, dName("SUBAs"); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
453 MakeDisF(disMULAs, dName("MULAs"); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
454 MakeDisF(disMADDs, dName("MADDs"); dCP132(_Fd_); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
455 MakeDisF(disMSUBs, dName("MSUBs"); dCP132(_Fd_); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
456 MakeDisF(disMADDAs, dName("MADDAs"); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
457 MakeDisF(disMSUBAs, dName("MSUBAs"); dCP1acc(); dCP132(_Fs_); dCP132(_Ft_);)
458 MakeDisF(disCVTWs, dName("CVTWs"); dCP132(_Fd_); dCP132(_Fs_);)
459 MakeDisF(disMAXs, dName("MAXs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
460 MakeDisF(disMINs, dName("MINs"); dCP132(_Fd_); dCP132(_Fs_); dCP132(_Ft_);)
461 MakeDisF(disCFs, dName("CFs"); dCP132(_Fs_); dCP132(_Ft_);)
462 MakeDisF(disCEQs, dName("CEQs"); dCP132(_Fs_); dCP132(_Ft_);)
463 MakeDisF(disCLTs, dName("CLTs"); dCP132(_Fs_); dCP132(_Ft_);)
464 MakeDisF(disCLEs, dName("CLEs"); dCP132(_Fs_); dCP132(_Ft_);)
465
466 MakeDisF(disCVTSw, dName("CVTSw"); dCP132(_Fd_); dCP132(_Fs_);)
467
468 /*********************************************************
469 * Load and store for COP1 *
470 * Format: OP rt, offset(base) *
471 *********************************************************/
472
473 MakeDisF(disLWC1, dName("LWC1"); dCP132(_Ft_); dOffset();)
474 MakeDisF(disSWC1, dName("SWC1"); dCP132(_Ft_); dOffset();)
475
476 /*********************************************************
477 * Conditional Move *
478 * Format: OP rd, rs, rt *
479 *********************************************************/
480
481 MakeDisF(disMOVZ, dName("MOVZ"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
482 MakeDisF(disMOVN, dName("MOVN"); dGPR64(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
483
484 /*********************************************************
485 * MMI opcodes *
486 * *
487 *********************************************************/
488
489 MakeDisF(disMULT1, dName("MULT1");)
490 MakeDisF(disMULTU1, dName("MULTU1");)
491
492 /*********************************************************
493 * MMI0 opcodes *
494 * *
495 *********************************************************/
496
497 MakeDisF(disPADDW, dName("PADDW");)
498 MakeDisF(disPADDH, dName("PADDH");)
499 MakeDisF(disPADDB, dName("PADDB");)
500
501 MakeDisF(disPADDSW, dName("PADDSW");)
502 MakeDisF(disPADDSH, dName("PADDSH");)
503 MakeDisF(disPADDSB, dName("PADDSB");)
504
505 MakeDisF(disPSUBW, dName("PSUBW");)
506 MakeDisF(disPSUBH, dName("PSUBH");)
507 MakeDisF(disPSUBB, dName("PSUBB");)
508
509 MakeDisF(disPSUBSW, dName("PSUBSW");)
510 MakeDisF(disPSUBSH, dName("PSUBSH");)
511 MakeDisF(disPSUBSB, dName("PSUBSB");)
512
513 MakeDisF(disPCGTW, dName("PCGTW");)
514 MakeDisF(disPCGTH, dName("PCGTH");)
515 MakeDisF(disPCGTB, dName("PCGTB");)
516
517 MakeDisF(disPMAXW, dName("PMAXW");)
518 MakeDisF(disPMAXH, dName("PMAXH");)
519
520 MakeDisF(disPEXTLW, dName("PEXTLW"); dGPR128(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
521 MakeDisF(disPEXTLH, dName("PEXTLH"); dGPR128(_Rd_); dGPR64(_Rs_); dGPR64(_Rt_);)
522 MakeDisF(disPEXTLB, dName("PEXTLB");)
523 MakeDisF(disPEXTS, dName("PEXTS");)
524
525 MakeDisF(disPPACW, dName("PPACW");)
526 MakeDisF(disPPACH, dName("PPACH");)
527 MakeDisF(disPPACB, dName("PPACB");)
528 MakeDisF(disPPACS, dName("PPACS");)
529
530 /*********************************************************
531 * MMI1 opcodes *
532 * *
533 *********************************************************/
534
535 MakeDisF(disPADSBH, dName("PADSBH");)
536
537 MakeDisF(disPABSW, dName("PABSW");)
538 MakeDisF(disPABSH, dName("PABSH");)
539
540 MakeDisF(disPCEQW, dName("PCEQW");)
541 MakeDisF(disPCEQH, dName("PCEQH");)
542 MakeDisF(disPCEQB, dName("PCEQB");)
543
544 MakeDisF(disPMINW, dName("PMINW");)
545 MakeDisF(disPMINH, dName("PMINH");)
546
547 MakeDisF(disPADDUW, dName("PADDUW");)
548 MakeDisF(disPADDUH, dName("PADDUH");)
549 MakeDisF(disPADDUB, dName("PADDUB");)
550
551 MakeDisF(disPSUBUW, dName("PSUBUW");)
552 MakeDisF(disPSUBUH, dName("PSUBUH");)
553 MakeDisF(disPSUBUB, dName("PSUBUB");)
554
555 MakeDisF(disPEXTUW, dName("PEXTUW"); dGPR128(_Rd_); dGPR64U(_Rs_); dGPR64U(_Rt_);)
556 MakeDisF(disPEXTUH, dName("PEXTUH"); dGPR128(_Rd_); dGPR64U(_Rs_); dGPR64U(_Rt_);)
557 MakeDisF(disPEXTUB, dName("PEXTUB");)
558
559 MakeDisF(disQFSRV, dName("QFSRV");)
560
561 /*********************************************************
562 * MMI2 opcodes *
563 * *
564 *********************************************************/
565
566 MakeDisF(disPMADDW, dName("PMADDW");)
567 MakeDisF(disPMADDH, dName("PMADDH");)
568
569 MakeDisF(disPSLLVW, dName("PSLLVW");)
570 MakeDisF(disPSRLVW, dName("PSRLVW");)
571
572 MakeDisF(disPMFHI, dName("PMFHI");)
573 MakeDisF(disPMFLO, dName("PMFLO");)
574
575 MakeDisF(disPINTH, dName("PINTH");)
576
577 MakeDisF(disPMULTW, dName("PMULTW");)
578 MakeDisF(disPMULTH, dName("PMULTH");)
579
580 MakeDisF(disPDIVW, dName("PDIVW");)
581 MakeDisF(disPDIVH, dName("PDIVH");)
582
583 MakeDisF(disPCPYLD, dName("PCPYLD"); dGPR128(_Rd_); dGPR128(_Rs_); dGPR128(_Rt_);)
584
585 MakeDisF(disPAND, dName("PAND"); dGPR128(_Rd_); dGPR128(_Rs_); dGPR128(_Rt_);)
586 MakeDisF(disPXOR, dName("PXOR"); dGPR128(_Rd_); dGPR128(_Rs_); dGPR128(_Rt_);)
587
588 MakeDisF(disPMSUBW, dName("PMSUBW");)
589 MakeDisF(disPMSUBH, dName("PMSUBH");)
590
591 MakeDisF(disPHMADH, dName("PHMADH");)
592 MakeDisF(disPHMSBH, dName("PHMSBH");)
593
594 MakeDisF(disPEXEW, dName("PEXEW");)
595 MakeDisF(disPEXEH, dName("PEXEH");)
596
597 MakeDisF(disPREVH, dName("PREVH");)
598
599 MakeDisF(disPDIVBW, dName("PDIVBW");)
600
601 MakeDisF(disPROT3W, dName("PROT3W");)
602
603 /*********************************************************
604 * MMI3 opcodes *
605 * *
606 *********************************************************/
607
608 MakeDisF(disPMADDUW, dName("PMADDUW");)
609
610 MakeDisF(disPSRAVW, dName("PSRAVW");)
611
612 MakeDisF(disPMTHI, dName("PMTHI");)
613 MakeDisF(disPMTLO, dName("PMTLO");)
614
615 MakeDisF(disPINTEH, dName("PINTEH");)
616
617 MakeDisF(disPMULTUW, dName("PMULTUW");)
618 MakeDisF(disPDIVUW, dName("PDIVUW");)
619
620 MakeDisF(disPCPYUD, dName("PCPYUD"); dGPR128(_Rd_); dGPR128(_Rt_); dGPR128(_Rs_);)
621
622 MakeDisF(disPOR, dName("POR"); dGPR128(_Rd_); dGPR128(_Rs_); dGPR128(_Rt_);)
623 MakeDisF(disPNOR, dName("PNOR"); dGPR128(_Rd_); dGPR128(_Rs_); dGPR128(_Rt_);)
624
625 MakeDisF(disPEXCH, dName("PEXCH");)
626 MakeDisF(disPEXCW, dName("PEXCW");)
627
628 MakeDisF(disPCPYH, dName("PCPYH"); dGPR128(_Rd_); dGPR128(_Rt_);)
629
630 /*********************************************************
631 * COP2 opcodes *
632 * *
633 *********************************************************/
634
635 #define _Ft_ _Rt_
636 #define _Fs_ _Rd_
637 #define _Fd_ _Sa_
638
639 #define _X code>>24
640 #define _Y code>>23
641 #define _Z code>>22
642 #define _W code>>21
643
644 MakeDisF(disLQC2, dName("LQC2"); dCP2128f(_Rt_); dOfB();)
645 MakeDisF(disSQC2, dName("SQC2"); dCP2128f(_Rt_); dOfB();)
646
647 MakeDisF(disQMFC2, dName("QMFC2");)
648 MakeDisF(disQMTC2, dName("QMTC2");)
649 MakeDisF(disCFC2, dName("CFC2"); dGPR32(_Rt_); dCP232i(_Fs_);)
650 MakeDisF(disCTC2, dName("CTC2"); dCP232i(_Fs_); dGPR32(_Rt_);)
651
652 MakeDisF(disBC2F, dName("BC2F");)
653 MakeDisF(disBC2T, dName("BC2T");)
654 MakeDisF(disBC2FL, dName("BC2FL");)
655 MakeDisF(disBC2TL, dName("BC2TL");)
656
657 // SPEC1
658 MakeDisF(disVADD, dName("VADD");)
659 MakeDisF(disVADDx, dName("VADDx"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
660 MakeDisF(disVADDy, dName("VADDy"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
661 MakeDisF(disVADDz, dName("VADDz"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
662 MakeDisF(disVADDw, dName("VADDw"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
663 MakeDisF(disVADDq, dName("VADDq"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP232iF(REG_Q);)
664 MakeDisF(disVADDi, dName("VADDi"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP232iF(REG_I);)
665 MakeDisF(disVSUB, dName("VSUB");)
666 MakeDisF(disVSUBx, dName("VSUBx"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
667 MakeDisF(disVSUBy, dName("VSUBy"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
668 MakeDisF(disVSUBz, dName("VSUBz"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
669 MakeDisF(disVSUBw, dName("VSUBw"); dCP2128f(_Fd_); dCP2128f(_Fs_); dCP2128f(_Ft_);)
670 MakeDisF(disVSUBq, dName("VSUBq");)
671 MakeDisF(disVSUBi, dName("VSUBi");)
672 MakeDisF(disVMADD, dName("VMADD");)
673 MakeDisF(disVMADDx, dName("VMADDx"); dCP2128f(_Fd_); dCP2ACCf(); dCP2128f(_Fs_); dCP232x(_Ft_);)
674 MakeDisF(disVMADDy, dName("VMADDy"); dCP2128f(_Fd_); dCP2ACCf(); dCP2128f(_Fs_); dCP232y(_Ft_);)
675 MakeDisF(disVMADDz, dName("VMADDz"); dCP2128f(_Fd_); dCP2ACCf(); dCP2128f(_Fs_); dCP232z(_Ft_);)
676 MakeDisF(disVMADDw, dName("VMADDw"); dCP2128f(_Fd_); dCP2ACCf(); dCP2128f(_Fs_); dCP232w(_Ft_);)
677 MakeDisF(disVMADDq, dName("VMADDq");)
678 MakeDisF(disVMADDi, dName("VMADDi");)
679 MakeDisF(disVMSUB, dName("VMSUB");)
680 MakeDisF(disVMSUBx, dName("VMSUBx");)
681 MakeDisF(disVMSUBy, dName("VMSUBy");)
682 MakeDisF(disVMSUBz, dName("VMSUBz");)
683 MakeDisF(disVMSUBw, dName("VMSUBw");)
684 MakeDisF(disVMSUBq, dName("VMSUBq");)
685 MakeDisF(disVMSUBi, dName("VMSUBi");)
686 MakeDisF(disVMAX, dName("VMAX");)
687 MakeDisF(disVMAXx, dName("VMAXx");)
688 MakeDisF(disVMAXy, dName("VMAXy");)
689 MakeDisF(disVMAXz, dName("VMAXz");)
690 MakeDisF(disVMAXw, dName("VMAXw");)
691 MakeDisF(disVMAXi, dName("VMAXi");)
692 MakeDisF(disVMINI, dName("VMINI");)
693 MakeDisF(disVMINIx, dName("VMINIx");)
694 MakeDisF(disVMINIy, dName("VMINIy");)
695 MakeDisF(disVMINIz, dName("VMINIz");)
696 MakeDisF(disVMINIw, dName("VMINIw");)
697 MakeDisF(disVMINIi, dName("VMINIi");)
698 MakeDisF(disVMUL, dName("VMUL");)
699 MakeDisF(disVMULx, dName("VMULx");)
700 MakeDisF(disVMULy, dName("VMULy");)
701 MakeDisF(disVMULz, dName("VMULz");)
702 MakeDisF(disVMULw, dName("VMULw");)
703 MakeDisF(disVMULq, dName("VMULq");)
704 MakeDisF(disVMULi, dName("VMULi");)
705 MakeDisF(disVIADD, dName("VIADD");)
706 MakeDisF(disVIADDI, dName("VIADDI");)
707 MakeDisF(disVISUB, dName("VISUB");)
708 MakeDisF(disVIAND, dName("VIAND");)
709 MakeDisF(disVIOR, dName("VIOR");)
710 MakeDisF(disVOPMSUB, dName("VOPMSUB");)
711 MakeDisF(disVCALLMS, dName("VCALLMS");)
712 MakeDisF(disVCALLMSR, dName("VCALLMSR");)
713
714 // SPEC2
715 MakeDisF(disVADDA, dName("VADDA");)
716 MakeDisF(disVADDAx, dName("VADDAx");)
717 MakeDisF(disVADDAy, dName("VADDAy");)
718 MakeDisF(disVADDAz, dName("VADDAz");)
719 MakeDisF(disVADDAw, dName("VADDAw");)
720 MakeDisF(disVADDAq, dName("VADDAq");)
721 MakeDisF(disVADDAi, dName("VADDAi");)
722 MakeDisF(disVMADDA, dName("VMADDA");)
723 MakeDisF(disVMADDAx, dName("VMADDAx"); dCP2ACCf(); dCP2128f(_Fs_); dCP232x(_Ft_);)
724 MakeDisF(disVMADDAy, dName("VMADDAy"); dCP2ACCf(); dCP2128f(_Fs_); dCP232y(_Ft_);)
725 MakeDisF(disVMADDAz, dName("VMADDAz"); dCP2ACCf(); dCP2128f(_Fs_); dCP232z(_Ft_);)
726 MakeDisF(disVMADDAw, dName("VMADDAw"); dCP2ACCf(); dCP2128f(_Fs_); dCP232w(_Ft_);)
727 MakeDisF(disVMADDAq, dName("VMADDAq");)
728 MakeDisF(disVMADDAi, dName("VMADDAi");)
729 MakeDisF(disVSUBAx, dName("VSUBAx");)
730 MakeDisF(disVSUBAy, dName("VSUBAy");)
731 MakeDisF(disVSUBAz, dName("VSUBAz");)
732 MakeDisF(disVSUBAw, dName("VSUBAw");)
733 MakeDisF(disVMSUBAx, dName("VMSUBAx");)
734 MakeDisF(disVMSUBAy, dName("VMSUBAy");)
735 MakeDisF(disVMSUBAz, dName("VMSUBAz");)
736 MakeDisF(disVMSUBAw, dName("VMSUBAw");)
737 MakeDisF(disVITOF0, dName("VITOF0");)
738 MakeDisF(disVITOF4, dName("VITOF4");)
739 MakeDisF(disVITOF12, dName("VITOF12");)
740 MakeDisF(disVITOF15, dName("VITOF15");)
741 MakeDisF(disVFTOI0, dName("VFTOI0");)
742 MakeDisF(disVFTOI4, dName("VFTOI4");)
743 MakeDisF(disVFTOI12, dName("VFTOI12");)
744 MakeDisF(disVFTOI15, dName("VFTOI15");)
745 MakeDisF(disVMULA, dName("VMULA");)
746 MakeDisF(disVMULAx, dName("VMULAx"); dCP2ACCf(); dCP2128f(_Fs_); dCP232x(_Ft_);)
747 MakeDisF(disVMULAy, dName("VMULAy");)
748 MakeDisF(disVMULAz, dName("VMULAz");)
749 MakeDisF(disVMULAw, dName("VMULAw");)
750 MakeDisF(disVMOVE, dName("VMOVE"); dCP2128f(_Ft_); dCP2128f(_Fs_);)
751 MakeDisF(disVMR32, dName("VMR32");)
752 MakeDisF(disVDIV, dName("VDIV");)
753 MakeDisF(disVSQRT, dName("VSQRT"); dCP232f(_Ft_, _Ftf_);)
754 MakeDisF(disVRSQRT, dName("VRSQRT");)
755 MakeDisF(disVRNEXT, dName("VRNEXT");)
756 MakeDisF(disVRGET, dName("VRGET");)
757 MakeDisF(disVRINIT, dName("VRINIT");)
758 MakeDisF(disVRXOR, dName("VRXOR");)
759 MakeDisF(disVWAITQ, dName("VWAITQ");)
760
761 /*********************************************************
762 * Special purpose instructions *
763 * Format: OP *
764 *********************************************************/
765
766 MakeDisF(disSYNC, dName("SYNC");)
767 MakeDisF(disBREAK, dName("BREAK");)
768 MakeDisF(disSYSCALL, dName("SYSCALL"); dCode();)
769 MakeDisF(disCACHE, ssappendf(output, "%-7s, %x,", "CACHE", _Rt_); dOfB();)
770 MakeDisF(disPREF, dName("PREF");)
771
772 MakeDisF(disMFSA, dName("MFSA"); dGPR64(_Rd_); dSaR();)
773 MakeDisF(disMTSA, dName("MTSA"); dGPR64(_Rs_); dSaR();)
774
775 MakeDisF(disMTSAB, dName("MTSAB");dGPR64(_Rs_); dImm();)
776 MakeDisF(disMTSAH, dName("MTSAH");dGPR64(_Rs_); dImm();)
777
778 MakeDisF(disTGE, dName("TGE"); dGPR64(_Rs_); dGPR64(_Rt_);)
779 MakeDisF(disTGEU, dName("TGEU"); dGPR64(_Rs_); dGPR64(_Rt_);)
780 MakeDisF(disTLT, dName("TLT"); dGPR64(_Rs_); dGPR64(_Rt_);)
781 MakeDisF(disTLTU, dName("TLTU"); dGPR64(_Rs_); dGPR64(_Rt_);)
782 MakeDisF(disTEQ, dName("TEQ"); dGPR64(_Rs_); dGPR64(_Rt_);)
783 MakeDisF(disTNE, dName("TNE"); dGPR64(_Rs_); dGPR64(_Rt_);)
784
785 MakeDisF(disTGEI, dName("TGEI"); dGPR64(_Rs_); dImm();)
786 MakeDisF(disTGEIU, dName("TGEIU"); dGPR64(_Rs_); dImm();)
787 MakeDisF(disTLTI, dName("TLTI"); dGPR64(_Rs_); dImm();)
788 MakeDisF(disTLTIU, dName("TLTIU"); dGPR64(_Rs_); dImm();)
789 MakeDisF(disTEQI, dName("TEQI"); dGPR64(_Rs_); dImm();)
790 MakeDisF(disTNEI, dName("TNEI"); dGPR64(_Rs_); dImm();)
791
792 /*********************************************************
793 * Unknown instruction (would generate an exception) *
794 * Format: ? *
795 *********************************************************/
796 static MakeDisF(disNULL, dName("*** Bad OP ***");)
797
798 TdisR5900F disR5900_MMI0[] = { // Subset of disMMI0
799 disPADDW, disPSUBW, disPCGTW, disPMAXW,
800 disPADDH, disPSUBH, disPCGTH, disPMAXH,
801 disPADDB, disPSUBB, disPCGTB, disNULL,
802 disNULL, disNULL, disNULL, disNULL,
803 disPADDSW, disPSUBSW, disPEXTLW, disPPACW,
804 disPADDSH, disPSUBSH, disPEXTLH, disPPACH,
805 disPADDSB, disPSUBSB, disPEXTLB, disPPACB,
806 disNULL, disNULL, disPEXTS, disPPACS};
807
808 static void disMMI0( string& output, u32 code )
809 {
810 disR5900_MMI0[_Sa_]( output, code );
811 }
812
813 TdisR5900F disR5900_MMI1[] = { // Subset of disMMI1
814 disNULL, disPABSW, disPCEQW, disPMINW,
815 disPADSBH, disPABSH, disPCEQH, disPMINH,
816 disNULL, disNULL, disPCEQB, disNULL,
817 disNULL, disNULL, disNULL, disNULL,
818 disPADDUW, disPSUBUW, disPEXTUW, disNULL,
819 disPADDUH, disPSUBUH, disPEXTUH, disNULL,
820 disPADDUB, disPSUBUB, disPEXTUB, disQFSRV,
821 disNULL, disNULL, disNULL, disNULL};
822
823 static void disMMI1( string& output, u32 code )
824 {
825 disR5900_MMI1[_Sa_]( output, code );
826 }
827
828 TdisR5900F disR5900_MMI2[] = { // Subset of disMMI2
829 disPMADDW, disNULL, disPSLLVW, disPSRLVW,
830 disPMSUBW, disNULL, disNULL, disNULL,
831 disPMFHI, disPMFLO, disPINTH, disNULL,
832 disPMULTW, disPDIVW, disPCPYLD, disNULL,
833 disPMADDH, disPHMADH, disPAND, disPXOR,
834 disPMSUBH, disPHMSBH, disNULL, disNULL,
835 disNULL, disNULL, disPEXEH, disPREVH,
836 disPMULTH, disPDIVBW, disPEXEW, disPROT3W};
837
838 static void disMMI2( string& output, u32 code )
839 {
840 disR5900_MMI2[_Sa_]( output, code );
841 }
842
843 TdisR5900F disR5900_MMI3[] = { // Subset of disMMI3
844 disPMADDUW, disNULL, disNULL, disPSRAVW,
845 disNULL, disNULL, disNULL, disNULL,
846 disPMTHI, disPMTLO, disPINTEH, disNULL,
847 disPMULTUW, disPDIVUW, disPCPYUD, disNULL,
848 disNULL, disNULL, disPOR, disPNOR,
849 disNULL, disNULL, disNULL, disNULL,
850 disNULL, disNULL, disPEXCH, disPCPYH,
851 disNULL, disNULL, disPEXCW, disNULL};
852
853 static void disMMI3( string& output, u32 code )
854 {
855 disR5900_MMI3[_Sa_]( output, code );
856 }
857
858 TdisR5900F disR5900_MMI[] = { // Subset of disMMI
859 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
860 disMMI0, disMMI2, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
861 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
862 disMULT1, disMULTU1, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
863 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
864 disMMI1, disMMI3, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
865 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
866 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
867
868 static void disMMI( string& output, u32 code )
869 {
870 disR5900_MMI[_Funct_]( output, code );
871 }
872
873
874 TdisR5900F disR5900_COP0_BC0[] = { //subset of disCOP0 BC
875 disBC0F, disBC0T, disBC0FL, disBC0TL, disNULL, disNULL, disNULL, disNULL,
876 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
877 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
878 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
879 };
880
881 static void disCOP0_BC0( string& output, u32 code )
882 {
883 disR5900_COP0_BC0[_Rt_]( output, code );
884 }
885
886 TdisR5900F disR5900_COP0_Func[] = { //subset of disCOP0 Function
887 disNULL, disTLBR, disTLBWI, disNULL, disNULL, disNULL, disTLBWR, disNULL,
888 disTLBP, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
889 disNULL, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
890 disERET, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
891 disNULL, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
892 disNULL, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
893 disNULL, disNULL, disNULL , disNULL, disNULL, disNULL, disNULL , disNULL,
894 disEI , disDI , disNULL , disNULL, disNULL, disNULL, disNULL , disNULL
895 };
896 static void disCOP0_Func( string& output, u32 code )
897 {
898 disR5900_COP0_Func[_Funct_]( output, code );
899 }
900
901 TdisR5900F disR5900_COP0[] = { // Subset of disCOP0
902 disMFC0, disNULL, disNULL, disNULL, disMTC0, disNULL, disNULL, disNULL,
903 disCOP0_BC0, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
904 disCOP0_Func, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
905 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
906
907 static void disCOP0( string& output, u32 code )
908 {
909 disR5900_COP0[_Rs_]( output, code );
910 }
911
912 TdisR5900F disR5900_COP1_S[] = { //subset of disCOP1 S
913 disADDs, disSUBs, disMULs, disDIVs, disSQRTs, disABSs, disMOVs, disNEGs,
914 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
915 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disRSQRTs, disNULL,
916 disADDAs, disSUBAs, disMULAs, disNULL, disMADDs, disMSUBs, disMADDAs, disMSUBAs,
917 disNULL, disNULL, disNULL, disNULL, disCVTWs, disNULL, disNULL, disNULL,
918 disMINs, disMAXs, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
919 disCFs, disNULL, disCEQs, disNULL, disCLTs, disNULL, disCLEs, disNULL,
920 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
921 };
922
923 static void disCOP1_S( string& output, u32 code )
924 {
925 disR5900_COP1_S[_Funct_]( output, code );
926 }
927
928 TdisR5900F disR5900_COP1_W[] = { //subset of disCOP1 W
929 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
930 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
931 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
932 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
933 disCVTSw, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
934 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
935 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
936 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
937 };
938
939 static void disCOP1_W( string& output, u32 code )
940 {
941 disR5900_COP1_W[_Funct_]( output, code );
942 }
943
944 TdisR5900F disR5900_COP1_BC1[] = { //subset of disCOP1 BC
945 disBC1F, disBC1T, disBC1FL, disBC1TL, disNULL, disNULL, disNULL, disNULL,
946 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
947 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
948 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
949 };
950
951 static void disCOP1_BC1( string& output, u32 code )
952 {
953 disR5900_COP1_BC1[_Rt_]( output, code );
954 }
955
956 TdisR5900F disR5900_COP1[] = { // Subset of disCOP1
957 disMFC1, disNULL, disCFC1, disNULL, disMTC1, disNULL, disCTC1, disNULL,
958 disCOP1_BC1, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
959 disCOP1_S, disNULL, disNULL, disNULL, disCOP1_W, disNULL, disNULL, disNULL,
960 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
961
962 static void disCOP1( string& output, u32 code )
963 {
964 disR5900_COP1[_Rs_]( output, code );
965 }
966
967 TdisR5900F disR5900_COP2_SPEC2[] = { //subset of disCOP2 SPEC2
968 disVADDAx, disVADDAy, disVADDAz, disVADDAw, disVSUBAx, disVSUBAy, disVSUBAz, disVSUBAw,
969 disVMADDAx, disVMADDAy, disVMADDAz, disVMADDAw, disVMSUBAx, disVMSUBAy, disVMSUBAz, disVMSUBAw,
970 disVITOF0, disVITOF4, disVITOF12, disVITOF15, disVFTOI0, disVFTOI4, disVFTOI12, disVFTOI15,
971 disVMULAx, disVMULAy, disVMULAz, disVMULAw, disNULL, disNULL, disNULL, disNULL,
972 disVADDAq, disVMADDAq, disVADDAi, disVMADDAi, disNULL, disNULL, disNULL, disNULL,
973 disVADDA, disVMADDA, disVMULA, disNULL, disNULL, disNULL, disNULL, disNULL,
974 disVMOVE, disVMR32, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
975 disVDIV, disVSQRT, disVRSQRT, disVWAITQ, disNULL, disNULL, disNULL, disNULL,
976 disVRNEXT, disVRGET, disVRINIT, disVRXOR, disNULL, disNULL, disNULL, disNULL,
977 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
978 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
979 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
980 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
981 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
982 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
983 disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
984 };
985
986 static void disCOP2_SPEC2( string& output, u32 code )
987 {
988 disR5900_COP2_SPEC2[(code & 0x3) | ((code >> 4) & 0x7c)]( output, code );
989 }
990
991 TdisR5900F disR5900_COP2_SPEC1[] = { //subset of disCOP2 SPEC1
992 disVADDx, disVADDy, disVADDz, disVADDw, disVSUBx, disVSUBy, disVSUBz, disVSUBw,
993 disVMADDx, disVMADDy, disVMADDz, disVMADDw, disVMSUBx, disVMSUBy, disVMSUBz, disVMSUBw,
994 disVMAXx, disVMAXy, disVMAXz, disVMAXw, disVMINIx, disVMINIy, disVMINIz, disVMINIw,
995 disVMULx, disVMULy, disVMULz, disVMULw, disVMULq, disVMAXi, disVMULi, disVMINIi,
996 disVADDq, disVMADDq, disVADDi, disVMADDi, disVSUBq, disVMSUBq, disVSUBi, disVMSUBi,
997 disVADD, disVMADD, disVMUL, disVMAX, disVSUB, disVMSUB, disVOPMSUB, disVMINI,
998 disVIADD, disVISUB, disVIADDI, disNULL, disVIAND, disVIOR, disNULL, disNULL,
999 disVCALLMS, disVCALLMSR, disNULL, disNULL, disCOP2_SPEC2, disCOP2_SPEC2, disCOP2_SPEC2, disCOP2_SPEC2,
1000 };
1001
1002 static void disCOP2_SPEC1( string& output, u32 code )
1003 {
1004 disR5900_COP2_SPEC1[_Funct_]( output, code );
1005 }
1006
1007 TdisR5900F disR5900_COP2_BC2[] = { //subset of disCOP2 BC
1008 disBC2F, disBC2T, disBC2FL, disBC2TL, disNULL, disNULL, disNULL, disNULL,
1009 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
1010 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
1011 disNULL, disNULL, disNULL , disNULL , disNULL, disNULL, disNULL, disNULL,
1012 };
1013
1014 static void disCOP2_BC2( string& output, u32 code )
1015 {
1016 disR5900_COP2_BC2[_Rt_]( output, code );
1017 }
1018
1019 TdisR5900F disR5900_COP2[] = { // Subset of disCOP2
1020 disNULL, disQMFC2, disCFC2, disNULL, disNULL, disQMTC2, disCTC2, disNULL,
1021 disCOP2_BC2, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
1022 disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1,
1023 disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1, disCOP2_SPEC1};
1024
1025 static void disCOP2( string& output, u32 code )
1026 {
1027 disR5900_COP2[_Rs_]( output, code );
1028 }
1029
1030 TdisR5900F disR5900_REGIMM[] = { // Subset of disREGIMM
1031 disBLTZ, disBGEZ, disBLTZL, disBGEZL, disNULL, disNULL, disNULL, disNULL,
1032 disTGEI, disTGEIU, disTLTI, disTLTIU, disTEQI, disNULL, disTNEI, disNULL,
1033 disBLTZAL, disBGEZAL, disBLTZALL, disBGEZALL, disNULL, disNULL, disNULL, disNULL,
1034 disMTSAB, disMTSAH , disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
1035
1036 static void disREGIMM( string& output, u32 code )
1037 {
1038 disR5900_REGIMM[_Rt_]( output, code );
1039 }
1040
1041 TdisR5900F disR5900_SPECIAL[] = {
1042 disSLL, disNULL, disSRL, disSRA, disSLLV, disNULL, disSRLV, disSRAV,
1043 disJR, disJALR, disMOVZ, disMOVN, disSYSCALL, disBREAK,disNULL, disSYNC,
1044 disMFHI, disMTHI, disMFLO, disMTLO, disDSLLV, disNULL, disDSRLV, disDSRAV,
1045 disMULT, disMULTU,disDIV, disDIVU, disNULL, disNULL, disNULL, disNULL,
1046 disADD, disADDU, disSUB, disSUBU, disAND, disOR, disXOR, disNOR,
1047 disMFSA , disMTSA, disSLT, disSLTU, disDADD, disDADDU,disDSUB, disDSUBU,
1048 disTGE, disTGEU, disTLT, disTLTU, disTEQ, disNULL, disTNE, disNULL,
1049 disDSLL, disNULL, disDSRL, disDSRA, disDSLL32, disNULL, disDSRL32,disDSRA32 };
1050
1051 static void disSPECIAL( string& output, u32 code )
1052 {
1053 disR5900_SPECIAL[_Funct_]( output, code );
1054 }
1055
1056 TdisR5900F disR5900[] = {
1057 disSPECIAL, disREGIMM, disJ , disJAL , disBEQ , disBNE , disBLEZ , disBGTZ ,
1058 disADDI , disADDIU , disSLTI, disSLTIU, disANDI, disORI , disXORI , disLUI ,
1059 disCOP0 , disCOP1 , disCOP2, disNULL , disBEQL, disBNEL, disBLEZL, disBGTZL,
1060 disDADDI , disDADDIU, disLDL , disLDR , disMMI , disNULL, disLQ , disSQ ,
1061 disLB , disLH , disLWL , disLW , disLBU , disLHU , disLWR , disLWU ,
1062 disSB , disSH , disSWL , disSW , disSDL , disSDR , disSWR , disCACHE,
1063 disNULL , disLWC1 , disNULL, disPREF , disNULL, disNULL, disLQC2 , disLD ,
1064 disNULL , disSWC1 , disNULL, disNULL , disNULL, disNULL, disSQC2 , disSD };
1065
1066 void disR5900F( string& output, u32 code )
1067 {
1068 disR5900[code >> 26]( output, code );
1069 }
1070
1071 // returns a string representation of the cpuRegs current instruction.
1072 // The return value of this method is *not* thread safe!
1073 const string& DisR5900CurrentState::getString()
1074 {
1075 result.clear();
1076 disR5900F( result, cpuRegs.code );
1077 return result;
1078 }
1079
1080 const char* DisR5900CurrentState::getCString()
1081 {
1082 result.clear();
1083 disR5900F( result, cpuRegs.code );
1084 return result.c_str();
1085 }
1086
1087 DisR5900CurrentState disR5900Current;
1088
1089 }

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