/[pcsx2_0.9.7]/trunk/pcsx2/Counters.h
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Contents of /trunk/pcsx2/Counters.h

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Revision 62 - (show annotations) (download)
Tue Sep 7 11:08:22 2010 UTC (9 years, 11 months ago) by william
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Auto Commited Import of: pcsx2-0.9.7-r3738-debug in ./trunk
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #pragma once
17
18 struct EECNT_MODE
19 {
20 // 0 - BUSCLK
21 // 1 - 1/16th of BUSCLK
22 // 2 - 1/256th of BUSCLK
23 // 3 - External Clock (hblank!)
24 u32 ClockSource:2;
25
26 // Enables the counter gate (turns counter on/off as according to the
27 // h/v blank type set in GateType).
28 u32 EnableGate:1;
29
30 // 0 - hblank! 1 - vblank!
31 // Note: the hblank source type is disabled when ClockSel = 3
32 u32 GateSource:1;
33
34 // 0 - count when the gate signal is low
35 // 1 - reset and start counting at the signal's rising edge (h/v blank end)
36 // 2 - reset and start counting at the signal's falling edge (h/v blank start)
37 // 3 - reset and start counting at both signal edges
38 u32 GateMode:2;
39
40 // Counter cleared to zero when target reached.
41 // The PS2 only resets if the TargetInterrupt is enabled - Tested on PS2
42 u32 ZeroReturn:1;
43
44 // General count enable/status. If 0, no counting happens.
45 // This flag is set/unset by the gates.
46 u32 IsCounting:1;
47
48 // Enables target interrupts.
49 u32 TargetInterrupt:1;
50
51 // Enables overflow interrupts.
52 u32 OverflowInterrupt:1;
53
54 // Set to true by the counter when the target is reached.
55 // Flag is set only when TargetInterrupt is enabled.
56 u32 TargetReached:1;
57
58 // Set to true by the counter when the target has overflowed.
59 // Flag is set only when OverflowInterrupt is enabled.
60 u32 OverflowReached:1;
61 };
62
63 // fixme: Cycle and sCycleT members are unused.
64 // But they can't be removed without making a new savestate version.
65 struct Counter
66 {
67 u32 count;
68 union
69 {
70 u32 modeval; // the mode as a 32 bit int (for optimized combination masks)
71 EECNT_MODE mode;
72 };
73 u32 target, hold;
74 u32 rate, interrupt;
75 u32 sCycleT; // delta values should be signed.
76 };
77
78 struct SyncCounter
79 {
80 u32 Mode;
81 u32 sCycle; // start cycle of timer
82 s32 CycleT;
83 };
84
85 //------------------------------------------------------------------
86 // SPEED HACKS!!! (1 is normal) (They have inverse affects, only set 1 at a time)
87 //------------------------------------------------------------------
88 #define HBLANK_COUNTER_SPEED 1 //Set to '3' to double the speed of games like KHII
89 //#define HBLANK_TIMER_SLOWDOWN 1 //Set to '2' to increase the speed of games like God of War (FPS will be less, but game will be faster)
90
91 //------------------------------------------------------------------
92 // NTSC Timing Information!!! (some scanline info is guessed)
93 //------------------------------------------------------------------
94 #define FRAMERATE_NTSC 29.97 // frames per second
95
96 #define SCANLINES_TOTAL_NTSC 525 // total number of scanlines
97 #define SCANLINES_VSYNC_NTSC 3 // scanlines that are used for syncing every half-frame
98 #define SCANLINES_VRENDER_NTSC 240 // scanlines in a half-frame (because of interlacing)
99 #define SCANLINES_VBLANK1_NTSC 19 // scanlines used for vblank1 (even interlace)
100 #define SCANLINES_VBLANK2_NTSC 20 // scanlines used for vblank2 (odd interlace)
101
102 //------------------------------------------------------------------
103 // PAL Timing Information!!! (some scanline info is guessed)
104 //------------------------------------------------------------------
105 #define FRAMERATE_PAL 25.0// frames per second * 100 (25)
106
107 #define SCANLINES_TOTAL_PAL 625 // total number of scanlines per frame
108 #define SCANLINES_VSYNC_PAL 5 // scanlines that are used for syncing every half-frame
109 #define SCANLINES_VRENDER_PAL 288 // scanlines in a half-frame (because of interlacing)
110 #define SCANLINES_VBLANK1_PAL 19 // scanlines used for vblank1 (even interlace)
111 #define SCANLINES_VBLANK2_PAL 20 // scanlines used for vblank2 (odd interlace)
112
113 //------------------------------------------------------------------
114 // vSync and hBlank Timing Modes
115 //------------------------------------------------------------------
116 #define MODE_VRENDER 0x0 //Set during the Render/Frame Scanlines
117 #define MODE_VBLANK 0x1 //Set during the Blanking Scanlines
118 #define MODE_VSYNC 0x3 //Set during the Syncing Scanlines
119 #define MODE_VBLANK1 0x0 //Set during the Blanking Scanlines (half-frame 1)
120 #define MODE_VBLANK2 0x1 //Set during the Blanking Scanlines (half-frame 2)
121
122 #define MODE_HRENDER 0x0 //Set for ~5/6 of 1 Scanline
123 #define MODE_HBLANK 0x1 //Set for the remaining ~1/6 of 1 Scanline
124
125
126 extern Counter counters[4];
127 extern SyncCounter hsyncCounter;
128 extern SyncCounter vsyncCounter;
129
130 extern s32 nextCounter; // delta until the next counter event (must be signed)
131 extern u32 nextsCounter;
132 extern uint g_FrameCount;
133
134 extern void rcntUpdate_hScanline();
135 extern void rcntUpdate_vSync();
136 extern void rcntUpdate();
137
138 extern void rcntInit();
139 extern u32 rcntRcount(int index);
140 template< uint page > extern bool rcntWrite32( u32 mem, mem32_t& value );
141 template< uint page > extern u16 rcntRead32( u32 mem ); // returns u16 by design! (see implementation for details)
142
143 extern u32 UpdateVSyncRate();
144 extern void frameLimitReset();
145

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