/[pcsx2_0.9.7]/trunk/common/src/x86emitter/cpudetect.cpp
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Diff of /trunk/common/src/x86emitter/cpudetect.cpp

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--- trunk/common/src/x86emitter/cpudetect.cpp	2010/12/23 11:48:33	279
+++ trunk/common/src/x86emitter/cpudetect.cpp	2010/12/23 12:02:12	280
@@ -59,13 +59,13 @@
 	// the fxsave buffer must be 16-byte aligned to avoid GPF.  I just save it to an
 	// unused portion of recSSE, since it has plenty of room to spare.
 
-	HostSys::MemProtectStatic( recSSE, Protect_ReadWrite, true );
+	HostSys::MemProtectStatic( recSSE, PageAccess_ReadWrite() );
 
 	xSetPtr( recSSE );
 	xFXSAVE( ptr[&targetFXSAVE] );
 	xRET();
 
-	HostSys::MemProtectStatic( recSSE, Protect_ReadOnly, true );
+	HostSys::MemProtectStatic( recSSE, PageAccess_ExecOnly() );
 
 	CallAddress( recSSE );
 
@@ -133,23 +133,6 @@
 	s32 regs[ 4 ];
 	u32 cmds;
 
-	LogicalCoresPerPhysicalCPU = 0;
-	PhysicalCoresPerPhysicalCPU = 1;
-
-	// detect multicore for Intel cpu
-
-	__cpuid( regs, 0 );
-	cmds = regs[ 0 ];
-	
-	if( cmds >= 0x00000001 )
-		LogicalCoresPerPhysicalCPU = ( regs[1] >> 16 ) & 0xff;
-
-	if ((cmds >= 0x00000004) && (VendorID == x86Vendor_Intel))
-	{
-		__cpuid( regs, 0x00000004 );
-		PhysicalCoresPerPhysicalCPU += ( regs[0] >> 26) & 0x3f;
-	}
-
 	__cpuid( regs, 0x80000000 );
 	cmds = regs[ 0 ];
 
@@ -157,9 +140,6 @@
 
 	if ((cmds >= 0x80000008) && (VendorID == x86Vendor_AMD) )
 	{
-		__cpuid( regs, 0x80000008 );
-		PhysicalCoresPerPhysicalCPU += ( regs[2] ) & 0xff;
-		
 		// AMD note: they don't support hyperthreading, but they like to flag this true
 		// anyway.  Let's force-unflag it until we come up with a better solution.
 		// (note: seems to affect some Phenom II's only? -- Athlon X2's and PhenomI's do
@@ -167,9 +147,6 @@
 		hasMultiThreading = 0;
 	}
 
-	if( !hasMultiThreading || LogicalCoresPerPhysicalCPU == 0 )
-		LogicalCoresPerPhysicalCPU = 1;
-
 	// This will assign values into LogicalCores and PhysicalCores
 	CountLogicalCores();
 }
@@ -310,7 +287,7 @@
 // Results of CPU
 void x86capabilities::SIMD_ExceptionTest()
 {
-	HostSys::MemProtectStatic( recSSE, Protect_ReadWrite, true );
+	HostSys::MemProtectStatic( recSSE, PageAccess_ReadWrite() );
 
 	//////////////////////////////////////////////////////////////////////////////////////////
 	// SIMD Instruction Support Detection (Second Pass)
@@ -336,7 +313,7 @@
 		xMOVDQU( xmm1, ptr[ecx] );
 		xRET();
 
-		HostSys::MemProtectStatic( recSSE, Protect_ReadOnly, true );
+		HostSys::MemProtectStatic( recSSE, PageAccess_ExecOnly() );
 
 		bool sse3_result = _test_instruction( recSSE );  // sse3
 		bool ssse3_result = _test_instruction( funcSSSE3 );

 

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