/[pcsx2_0.9.7]/trunk/common/include/x86emitter/implement/simd_shufflepack.h
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revision 61 by william, Tue Sep 7 03:24:11 2010 UTC revision 62 by william, Tue Sep 7 11:08:22 2010 UTC
# Line 25  struct xImplSimd_Shuffle Line 25  struct xImplSimd_Shuffle
25          inline void _selector_assertion_check( u8 selector ) const;          inline void _selector_assertion_check( u8 selector ) const;
26    
27          void PS( const xRegisterSSE& to, const xRegisterSSE& from, u8 selector ) const;          void PS( const xRegisterSSE& to, const xRegisterSSE& from, u8 selector ) const;
28          void PS( const xRegisterSSE& to, const ModSibBase& from, u8 selector ) const;          void PS( const xRegisterSSE& to, const xIndirectVoid& from, u8 selector ) const;
29    
30          void PD( const xRegisterSSE& to, const xRegisterSSE& from, u8 selector ) const;          void PD( const xRegisterSSE& to, const xRegisterSSE& from, u8 selector ) const;
31          void PD( const xRegisterSSE& to, const ModSibBase& from, u8 selector ) const;          void PD( const xRegisterSSE& to, const xIndirectVoid& from, u8 selector ) const;
32  };  };
33    
34  // --------------------------------------------------------------------------------------  // --------------------------------------------------------------------------------------
# Line 63  struct xImplSimd_PShuffle Line 63  struct xImplSimd_PShuffle
63          //          //
64          // Operands can be MMX or XMM registers.          // Operands can be MMX or XMM registers.
65          const xImplSimd_DestRegEither   B;          const xImplSimd_DestRegEither   B;
66    
67            // below is my test bed for a new system, free of subclasses.  Was supposed to improve intellisense
68            // but it doesn't (makes it worse).  Will try again in MSVC 2010. --air
69    
70            #if 0
71            // Copies words from src and inserts them into dest at word locations selected with
72            // the order operand (8 bit immediate).
73            void W( const xRegisterMMX& to, const xRegisterMMX& from, u8 imm ) const        { xOpWrite0F( 0x70, to, from, imm ); }
74            void W( const xRegisterMMX& to, const xIndirectVoid& from, u8 imm ) const               { xOpWrite0F( 0x70, to, from, imm ); }
75    
76            // Copies doublewords from src and inserts them into dest at dword locations selected
77            // with the order operand (8 bit immediate).
78            void D( const xRegisterSSE& to, const xRegisterSSE& from, u8 imm ) const        { xOpWrite0F( 0x66, 0x70, to, from, imm ); }
79            void D( const xRegisterSSE& to, const xIndirectVoid& from, u8 imm ) const               { xOpWrite0F( 0x66, 0x70, to, from, imm ); }
80    
81            // Copies words from the low quadword of src and inserts them into the low quadword
82            // of dest at word locations selected with the order operand (8 bit immediate).
83            // The high quadword of src is copied to the high quadword of dest.
84            void LW( const xRegisterSSE& to, const xRegisterSSE& from, u8 imm ) const       { xOpWrite0F( 0xf2, 0x70, to, from, imm ); }
85            void LW( const xRegisterSSE& to, const xIndirectVoid& from, u8 imm ) const              { xOpWrite0F( 0xf2, 0x70, to, from, imm ); }
86    
87            // Copies words from the high quadword of src and inserts them into the high quadword
88            // of dest at word locations selected with the order operand (8 bit immediate).
89            // The low quadword of src is copied to the low quadword of dest.
90            void HW( const xRegisterSSE& to, const xRegisterSSE& from, u8 imm ) const       { xOpWrite0F( 0xf3, 0x70, to, from, imm ); }
91            void HW( const xRegisterSSE& to, const xIndirectVoid& from, u8 imm ) const              { xOpWrite0F( 0xf3, 0x70, to, from, imm ); }
92    
93            // [sSSE-3] Performs in-place shuffles of bytes in dest according to the shuffle
94            // control mask in src.  If the most significant bit (bit[7]) of each byte of the
95            // shuffle control mask is set, then constant zero is written in the result byte.
96            // Each byte in the shuffle control mask forms an index to permute the corresponding
97            // byte in dest. The value of each index is the least significant 4 bits (128-bit
98            // operation) or 3 bits (64-bit operation) of the shuffle control byte.
99            //
100            // Operands can be MMX or XMM registers.
101            void B( const xRegisterSSE& to, const xRegisterSSE& from ) const        { OpWriteSSE( 0x66, 0x0038 ); }
102            void B( const xRegisterSSE& to, const xIndirectVoid& from ) const               { OpWriteSSE( 0x66, 0x0038 ); }
103            void B( const xRegisterMMX& to, const xRegisterMMX& from ) const        { OpWriteSSE( 0x00, 0x0038 ); }
104            void B( const xRegisterMMX& to, const xIndirectVoid& from ) const               { OpWriteSSE( 0x00, 0x0038 ); }
105            #endif
106  };  };
107    
108  // --------------------------------------------------------------------------------------  // --------------------------------------------------------------------------------------
# Line 161  struct xImplSimd_InsertExtractHelper Line 201  struct xImplSimd_InsertExtractHelper
201          void operator()( const xRegisterSSE& to, const xRegister32& from, u8 imm8 ) const;          void operator()( const xRegisterSSE& to, const xRegister32& from, u8 imm8 ) const;
202    
203          // [SSE-4.1] Allowed with SSE registers only (MMX regs are invalid)          // [SSE-4.1] Allowed with SSE registers only (MMX regs are invalid)
204          void operator()( const xRegisterSSE& to, const ModSibBase& from, u8 imm8 ) const;          void operator()( const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8 ) const;
205  };  };
206    
207  // --------------------------------------------------------------------------------------  // --------------------------------------------------------------------------------------
# Line 172  struct xImplSimd_InsertExtractHelper Line 212  struct xImplSimd_InsertExtractHelper
212  struct xImplSimd_PInsert  struct xImplSimd_PInsert
213  {  {
214          void W( const xRegisterSSE& to, const xRegister32& from, u8 imm8 ) const;          void W( const xRegisterSSE& to, const xRegister32& from, u8 imm8 ) const;
215          void W( const xRegisterSSE& to, const ModSibBase& from, u8 imm8 ) const;          void W( const xRegisterSSE& to, const xIndirectVoid& from, u8 imm8 ) const;
216    
217          void W( const xRegisterMMX& to, const xRegister32& from, u8 imm8 ) const;          void W( const xRegisterMMX& to, const xRegister32& from, u8 imm8 ) const;
218          void W( const xRegisterMMX& to, const ModSibBase& from, u8 imm8 ) const;          void W( const xRegisterMMX& to, const xIndirectVoid& from, u8 imm8 ) const;
219    
220          // [SSE-4.1] Allowed with SSE registers only (MMX regs are invalid)          // [SSE-4.1] Allowed with SSE registers only (MMX regs are invalid)
221          xImplSimd_InsertExtractHelper   B;          xImplSimd_InsertExtractHelper   B;
# Line 200  struct SimdImpl_PExtract Line 240  struct SimdImpl_PExtract
240          //          //
241          void W( const xRegister32& to, const xRegisterSSE& from, u8 imm8 ) const;          void W( const xRegister32& to, const xRegisterSSE& from, u8 imm8 ) const;
242          void W( const xRegister32& to, const xRegisterMMX& from, u8 imm8 ) const;          void W( const xRegister32& to, const xRegisterMMX& from, u8 imm8 ) const;
243          void W( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const;          void W( const xIndirectVoid& dest, const xRegisterSSE& from, u8 imm8 ) const;
244    
245          // [SSE-4.1] Copies the byte element specified by imm8 from src to dest.  The upper bits          // [SSE-4.1] Copies the byte element specified by imm8 from src to dest.  The upper bits
246          // of dest are zero-extended (cleared).  This can be used to extract any single packed          // of dest are zero-extended (cleared).  This can be used to extract any single packed

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