/[pcsx2_0.9.7]/trunk/common/include/x86emitter/implement/group1.h
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Contents of /trunk/common/include/x86emitter/implement/group1.h

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Revision 62 - (show annotations) (download)
Tue Sep 7 11:08:22 2010 UTC (9 years, 4 months ago) by william
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File size: 5478 byte(s)
Auto Commited Import of: pcsx2-0.9.7-r3738-debug in ./trunk
1 /* PCSX2 - PS2 Emulator for PCs
2 * Copyright (C) 2002-2010 PCSX2 Dev Team
3 *
4 * PCSX2 is free software: you can redistribute it and/or modify it under the terms
5 * of the GNU Lesser General Public License as published by the Free Software Found-
6 * ation, either version 3 of the License, or (at your option) any later version.
7 *
8 * PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
9 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
10 * PURPOSE. See the GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License along with PCSX2.
13 * If not, see <http://www.gnu.org/licenses/>.
14 */
15
16 #pragma once
17
18 namespace x86Emitter {
19
20 enum G1Type
21 {
22 G1Type_ADD=0,
23 G1Type_OR,
24 G1Type_ADC,
25 G1Type_SBB,
26 G1Type_AND,
27 G1Type_SUB,
28 G1Type_XOR,
29 G1Type_CMP
30 };
31
32 extern void _g1_EmitOp( G1Type InstType, const xRegisterInt& to, const xRegisterInt& from );
33
34 // --------------------------------------------------------------------------------------
35 // xImpl_Group1
36 // --------------------------------------------------------------------------------------
37 struct xImpl_Group1
38 {
39 G1Type InstType;
40
41 void operator()( const xRegister8& to, const xRegister8& from ) const;
42 void operator()( const xRegister16& to, const xRegister16& from ) const;
43 void operator()( const xRegister32& to, const xRegister32& from ) const;
44
45 void operator()( const xIndirectVoid& to, const xRegisterInt& from ) const;
46 void operator()( const xRegisterInt& to, const xIndirectVoid& from ) const;
47 void operator()( const xRegisterInt& to, int imm ) const;
48 void operator()( const xIndirect32orLess& to, int imm ) const;
49
50 #if 0
51 // ------------------------------------------------------------------------
52 template< typename T > __noinline void operator()( const ModSibBase& to, const xImmReg<T>& immOrReg ) const
53 {
54 _DoI_helpermess( *this, to, immOrReg );
55 }
56
57 template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xImmReg<T>& immOrReg ) const
58 {
59 _DoI_helpermess( *this, to, immOrReg );
60 }
61
62 template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, int imm ) const
63 {
64 _DoI_helpermess( *this, to, imm );
65 }
66
67 template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xDirectOrIndirect<T>& from ) const
68 {
69 _DoI_helpermess( *this, to, from );
70 }
71
72 // FIXME : Make this struct to 8, 16, and 32 bit registers
73 template< typename T > __noinline void operator()( const xRegisterBase& to, const xDirectOrIndirect<T>& from ) const
74 {
75 _DoI_helpermess( *this, xDirectOrIndirect<T>( to ), from );
76 }
77
78 // FIXME : Make this struct to 8, 16, and 32 bit registers
79 template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xRegisterBase& from ) const
80 {
81 _DoI_helpermess( *this, to, xDirectOrIndirect<T>( from ) );
82 }
83 #endif
84 };
85
86 // ------------------------------------------------------------------------
87 // This class combines x86 with SSE/SSE2 logic operations (ADD, OR, and NOT).
88 // Note: ANDN [AndNot] is handled below separately.
89 //
90 struct xImpl_G1Logic
91 {
92 G1Type InstType;
93
94 void operator()( const xRegister8& to, const xRegister8& from ) const;
95 void operator()( const xRegister16& to, const xRegister16& from ) const;
96 void operator()( const xRegister32& to, const xRegister32& from ) const;
97
98 void operator()( const xIndirectVoid& to, const xRegisterInt& from ) const;
99 void operator()( const xRegisterInt& to, const xIndirectVoid& from ) const;
100 void operator()( const xRegisterInt& to, int imm ) const;
101
102 void operator()( const xIndirect32orLess& to, int imm ) const;
103
104 xImplSimd_DestRegSSE PS; // packed single precision
105 xImplSimd_DestRegSSE PD; // packed double precision
106 };
107
108 // ------------------------------------------------------------------------
109 // This class combines x86 with SSE/SSE2 arithmetic operations (ADD/SUB).
110 //
111 struct xImpl_G1Arith
112 {
113 G1Type InstType;
114
115 void operator()( const xRegister8& to, const xRegister8& from ) const;
116 void operator()( const xRegister16& to, const xRegister16& from ) const;
117 void operator()( const xRegister32& to, const xRegister32& from ) const;
118
119 void operator()( const xIndirectVoid& to, const xRegisterInt& from ) const;
120 void operator()( const xRegisterInt& to, const xIndirectVoid& from ) const;
121 void operator()( const xRegisterInt& to, int imm ) const;
122
123 void operator()( const xIndirect32orLess& to, int imm ) const;
124
125 xImplSimd_DestRegSSE PS; // packed single precision
126 xImplSimd_DestRegSSE PD; // packed double precision
127 xImplSimd_DestRegSSE SS; // scalar single precision
128 xImplSimd_DestRegSSE SD; // scalar double precision
129 };
130
131 // ------------------------------------------------------------------------
132 struct xImpl_G1Compare
133 {
134 void operator()( const xRegister8& to, const xRegister8& from ) const;
135 void operator()( const xRegister16& to, const xRegister16& from ) const;
136 void operator()( const xRegister32& to, const xRegister32& from ) const;
137
138 void operator()( const xIndirectVoid& to, const xRegisterInt& from ) const;
139 void operator()( const xRegisterInt& to, const xIndirectVoid& from ) const;
140 void operator()( const xRegisterInt& to, int imm ) const;
141
142 void operator()( const xIndirect32orLess& to, int imm ) const;
143
144 xImplSimd_DestSSE_CmpImm PS;
145 xImplSimd_DestSSE_CmpImm PD;
146 xImplSimd_DestSSE_CmpImm SS;
147 xImplSimd_DestSSE_CmpImm SD;
148 };
149
150 } // End namespace x86Emitter
151

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